Nvidia Corporation

Sun Microsystems, Inc.

Samsung Semiconductor Inc.

Sun Micosystems, Inc.

Samsung Semiconductors

Curtis R Priem

Chris A Malachowsky

David S Rosenthal

David B Kirk

Shuen C Chang

Rick M Iwamoto

Robert J Rocchetti

Bruce McIntyre

Thomas P Webber

Guy Moffat

Hai D Ho

Walter E Donovan

Gopal Solanki

Stephen P Johnson

Joe L Yeun

Rick Silverman

Matthew Nicholas Papakipos

Michael G Lavelle

Satyanarayana Nishtala

Daniel E Lenoski

Peter A Mehring

Eugene Lapidous

Shaun Ho

Szu C Sun

Nola Donato

Don Bittel

Raymond Lim

David Schmenk

Christopher R Owen

Anissa Lam

Peter Ross

Charles Boynton

Embodiments of the present invention provide for initializing a device for use in a computer system. In one embodiment a BIOS routine reads a configuration register of each device in a computer system. The configuration register contains a device identifier indicating an oldest version of a device driver for controlling the device. The device identifier for each device is saved in a configuration data space. An operating system retrieves each device identifier contained in the configuration data space, and maps each device identifier to a corresponding device driver utilizing a registry. The operating system loads and causes execution of an initialization routine of each corresponding device driver mapped to each of the device identifiers.

Unified driver architecture device identifier strategy

A method and apparatus for providing latency based thread scheduling. A thread attribute, e.g., latency of a process, is used in effecting the scheduling of the thread.

Method and apparatus for latency based thread scheduling

A system for adjusting display data orientation. The system includes graphics circuitry to send and receive control signals over a set of control lines. The exchange of control signals is governed by a communication protocol. The graphics circuitry is configured to request orientation information via the set of control lines upon detecting a modulation of the set of control lines that is undefined by or illegal under the communication protocol. Based on the orientation information received in response to the request, the graphics circuitry adjusts the orientation of display data transmitted by the graphics circuitry.

System and method of detecting rotated displays

A method and apparatus which includes a graphics accelerator, circuitry responsive to pixel texture coordinates to select texels and generate therefrom a texture value for any pixel the color of which is to be modified by a texture, and a cache for texels for use by the circuitry to generate texture value for any pixel.

Texture cache for a computer graphics accelerator

A system and method for rendering fonts into a memory is disclosed. The system and method comprises a data structure located within the memory. The data structure includes at least one font array. The method and system includes a graphics controller for accessing at least one font array in the memory and for rendering characters of at least one font array into the appropriate locations in the memory to be scanned onto a monitor. Accordingly, a system and method in accordance with the present invention provides for a plurality of font arrays to be provided within a memory of a computer system. The memory could be the frame buffer, system memory or any other memory within the computer system. The graphics controller includes a mechanism which allows for a font array to be accessed by the graphics controller. The graphics controller also includes a mechanism for allowing each font character to be rendered into the memory. In so doing, the number of transfers from the CPU is significantly reduced.

Apparatus and method for rendering characters into a memory

A method for caching data defining vertices of a polygon to be displayed by an input/output display device including the steps of providing an index by a vertex for which data is to be cached, storing data defining attributes of a polygon at a vertex in a cache under the index provided, issuing a command signifying a polygon to be manipulated by indicating indices of the vertices of the polygon for which data is cached.

Method and apparatus for providing a vertex cache

A process of coordinating access to a shared resource by a plurality of execution units is provided. Channel control units are used to coordinate access to a shared resource. Each channel control unit reads semaphore values of a semaphore storage unit. In response to synchronization commands and semaphore values, the channel control unit manages the flow of execution instructions to the execution units in order to manage access to the shared resource.

Semaphore enhancement to improve system performance

A direct memory access (DMA) circuit which is physically positioned with an input/output device, the DMA circuit storing a first reference value pointing to a data structure which describes a buffer portion of system memory in which data is stored for transfer to the I/O device, a value determining a position within the buffer portion of system memory beginning at which a next sequence of data is to be placed, and a value determining a position within the buffer portion of system memory from which a next sequences of data is to be copied to the I/O device, the DMA circuit including circuitry for reading data from the buffer portion of system memory beginning at the position from which a next sequences of data is to be copied and for writing the data read to the I/O device.

Apparatus for accelerating the rendering of images

A method and graphics accelerator apparatus for pipelined generation of output values for a sequence of pixels, with generation of output values for each of at least two textured pixels during each pipeline clock interval. The apparatus includes a combiner stage capable of producing output values during each clock interval of the pipeline, wherein the output values are indicative of a blend of a plurality of textures with a single pixel when the combiner stage operates in a first mode, and the output values are indicative of a blend of an individual texture with two pixels when the combiner stage operates in a second mode.

Graphics pipeline selectively providing multiple pixels or multiple textures

A method, apparatus and article of manufacture are provided for minimizing the number of look-ups in a page table entry (PTE) data structure during mapping of virtual addresses to physical addresses when the physical addresses consist of contiguous addresses. First, a primary virtual address in a PTE data structure is accessed for mapping physical memory. Next, it is determined whether a primary physical address corresponding to the accessed primary virtual address is associated with a physical page having at least one contiguous physical page. If it is determined that such contiguous physical page exists, information relating to both the primary virtual address and any virtual and physical contiguous addresses in the PTE data structure is retrieved in a single look-up.

Method, apparatus and article of manufacture for mapping physical memory in a virtual address system

A graphics pipeline including a rasterizing stage producing diffuse color values; a plurality of texture stages producing texture values defining a particular texture; a combiner stage for combining four of a plurality of selectable input values including diffuse color values, texture values furnished by a plurality of texture stages, and proportions for combination of the selectable input values; the combiner stage being capable of providing a result equivalent to a sum of products of any two sets of input values, and a product of two input values.

Graphics pipeline including combiner stages

An arrangement which utilizes the system memory to store the wave tables used in the generation of high quality sound, and a direct memory access controller to rapidly transfer the portions of the wave tables stored in memory using the system bus so that a sound card may manipulate high quality sounds from wave tables stored directly in system memory without overloading the system bus and without the need for substantial additional memory on the sound card.

Method and apparatus for providing high quality audio in a computer system

Method and apparatus for accelerating the rendering of images

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Fremont, CA, United States of America

Curtis R Priem