Globitech Incorporated

Curtis Hall

G R Mohan Rao

Keith Lindberg

Danny Kenney

The present invention is directed to a wafer device method for processing same. A wafer for epitaxial deposition is backside sealed with a dopant seal layer (protection layer comprised of silicon dioxide or silicon nitride. Then, a layer of polysilicon is formed coextensively over the dopant seal layer. The polysilicon layer acts as a seed layer for potentially nodule forming gasses present during epitaxial deposition. During CVD epitaxy, the epitaxial layer is deposited on the primary surface with optimal resistivity uniformity. The fugitive gasses from the epitaxial process which diffuse to the wafer periphery and backside deposit as a film on the seed layer instead of in nodules. The polysilicon layer acts as a continuous seed layer which eliminates the preferential deposition at seal layer pinholes or island seed sites. The resulting structure of silicon substrate, dopant seal layer, polysilicon seed layer provides for nodule-free epitaxial deposition without increasing auto-doping and escalating the epitaxial resistivity non-uniformities. Alternatively, the wafer is sealed on the backside and peripheral edges with a dopant seal layer. Then, a layer of polysilicon is formed over the entire extent of the dopant seal layer. CVD epitaxy is performed, growing an epitaxial layer on the front side and depositing a film layer on the back side and peripheral edges of the wafer. The fugitive gasses from the epitaxial process which diffuse to the wafer backside and edge deposit as a film on the seed layer instead of in nodules. The amount of out-gassing is reduced because the peripheral edges of the wafer are covered with the dopant seal layer and since that layer is not exposed to the reaction gases, silicon spur and nodule formation is thwarted.

Wafer for preventing the formation of silicon nodules and method for preventing the formation of silicon nodules

The present invention is directed to a built-in solution for soft error protection by forming an epitaxial layer with a graded dopant concentration. By grading a dopant concentration, starting from a first dopant concentration and ending with a second dopant concentration at the device layer, usually determined by the characteristics of the device to be built in the device layer, a constant electric field (&#x3b5;-field) results from the changing dopant concentration. The creation of this &#x3b5;-field influences the stray, unwanted charges (or transient charges) away from critical device components. Charges that are created in the epitaxial layer are sweep downward, toward, and sometimes into, the substrate where they are absorbed, thus unable to cause a soft error in the device. The graded layer may be formed over the substrate and at a started dopant concentration different then that in the substrate itself, thereby further influencing the character of the electric field by creating a thin, but rather intense &#x3b5;-field at the interface junction between the epitaxial layer and the substrate. A graded epitaxial layer may also be used in conjunction with a P+ substrate by interposing an intrinsic layer between the device layer and the substrate. An even higher reduction is soft error rates are with P&#x2212; substrates in which a buried n-layer is formed between the substrate and the intrinsic layer. The addition of the n-layer causes a pair of additional electric fields to be created at the junction interfaces between the substrate and the intrinsic layer.

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Denison, TX, United States of America

Curtis Hall