Intel Corporation

Cunming Liang

Ping Yu

Ziye Yang

Yadong Li

Shaopeng He

Anjali Singhai Jain

Changpeng Liu

Jingjing Wu

Bo Cui

Daniel Daly

Jiang Yu

Liang J Ma

Hongjun Ni

Zhiguo Wen

Haitao Kang

Ren Wang

Jr-Shian Tsai

Xin Zeng

Weigang Li

David E Cohen

Changzheng Wei

Danny Yigang Zhou

Jiayu Hu

Tsung-Yuan Charles Tai

Jian Wang

Sujoy Sen

Andrew J Herdrich

Chen Wang

Parthasarathy Sarangam

Gang Cao

Mesut A Ergin

Namakkal N Venkatesan

Scott David Peterson

Yi Zou

Fan Zhang

James R Harris

Junyuan Wang

Xiaowen Zhang

Gerald Alan Rogers

Arun Raghunath

Roger Keith Wiles

Wenqian Yu

Junhua Hou

Baoqian Li

Shih-Wei Chien

Yigang Zhou

Xuekun Hu

Shun Hao

Edwin Verplank

Zhaoyan Chen

Martin Roberts

Daniel P Daly

Xiaobing Qian

Lin Luo

Shravan Nagraj

Helin Zhang

Shih-Wei Roger Chien

Examples include a computing system having a direct memory access (DMA) engine pipeline, a plurality of processing cores, each processing core including a core pipeline, and a memory coupled to the DMA engine pipeline and the plurality of processing cores. The computing system includes a pipeline selector coupled to the plurality of processing cores and the DMA engine pipeline, the pipeline selector to, during initialization, determine at least one threshold for pipeline selection for the computing system, and during runtime, select one of the core pipelines or the DMA engine pipeline to execute a memory copy operation in the memory based at least in part on the at least one threshold.

Adaptive pipeline selection for accelerating memory copy operations

Examples described herein relate to a switch configured to allocate packet processing resources, from a pool of packet processing resources, to multiple applications, wherein the pool of packet processing resources comprise configurable packet processing pipelines of one or more network devices and packet processing resources of one or more servers. In some examples, the configurable packet processing pipelines and the packet processing resources are to perform one or more of: network switch operations, microservice communications, and/or block storage operations. In some examples, the network switch operations comprise one or more of: application of at least one access control list (ACL), packet forwarding, packet routing, and/or Virtual Extensible LAN (VXLAN) or GENEVE termination. In some examples, the microservice communications comprise one or more of: packet routing between microservices and/or load balancing of utilized microservices.

Pooling of network processing resources

Examples described herein relate to a switch comprising a programmable data plane pipeline, wherein the programmable data plane pipeline is configured to provide microservice-to-microservice communications within a service mesh. In some examples, to provide microservice-to-microservice communications within a service mesh, the programmable data plane pipeline is to perform a forwarding operation for a communication from a first microservice to a second microservice. In some examples, to perform a forwarding operation for a communication from a first microservice to a second microservice, the programmable data plane pipeline is to utilize a reliable transport protocol.

Service mesh offload to network devices

Methods and apparatus for end-to-end data plane offloading for distributed storage using protocol hardware and Protocol Independent Switch Architecture (PISA) devices. Hardware-based data plane forwarding is implemented in compute and storage switches that comprise smart server switches running software executing in a kernel and user space. The compute switch is coupled to one or more compute servers/nodes and the storage server is coupled to one or more storage servers or storage arrays. The hardware-based data plane forwarding facilitates an end-to-end data plane between the computer server(s) and storage server(s)/array(s) that is offloaded to hardware. In one example the software comprises Ceph components used to implement control plane operations in connection with hardware offloaded data plane operations, and storage traffic employs the NVMe-oF protocol and the kernels include NVMe-oF modules. In one aspect the hardware-based data plane forwarding is implemented using programmable P4switch chips. In one aspect the storage and server switches are Top of Rack (ToR) switches.

End-to-end data plane offloading for distributed storage using protocol hardware and PISA devices

Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

Reliable transport offloaded to network devices

In some examples, for process-to-process communication, such as in function linking, a virtual channel can be provisioned to provide virtual machine to virtual machine communications. In response to a transmit request from a source virtual machine, the virtual channel can cause a data copy from a source buffer associated with the source virtual machine without decryption or encryption. The virtual channel provisions a key identifier for the copied data. The destination virtual machine can receive an indication data is available and can cause the data to be decrypted using a key accessed using the key identifier and source address of the copied data. In addition, the data can be encrypted using a second, different key for storage in a destination buffer associated with the destination virtual machine. In some examples, the key identifier and source address is managed by the virtual channel and is not visible to virtual machine or hypervisor.

Process-to-process secure data movement in network functions virtualization infrastructures

An example electronic apparatus is for accelerating a para-virtualization network interface. The electronic apparatus includes a descriptor hub performing bi-directionally communication with a guest memory accessible by a guest and with a host memory accessible by a host. The guest includes a plurality of virtual machines. The host includes a plurality of virtual function devices. The virtual machines are communicatively coupled to the electronic apparatus through a central processing unit. The communication is based upon para-virtualization packet descriptors and network interface controller virtual function-specific descriptors. The electronic apparatus also includes a device association table communicatively coupled to the descriptor hub and to store associations between the virtual machines and the virtual function devices. The electronic apparatus further includes an input-output memory map unit (IOMMU) to perform direct memory access (DMA) remapping and interrupt remapping.

Accelerating para-virtualization of a network interface using direct memory access (DMA) remapping

There is disclosed an example of a computing apparatus for providing a hardware-assisted virtual switch on a host, including: a hardware virtual switch (vSwitch) circuit; and a hardware virtual host (vHost) circuit, the vHost circuit having an interface driver specific to the hardware vSwitch and configured to provide a vHost data plane to: provide a plurality of hardware queues to communicatively couple the hardware vSwitch to a guest virtual function (VF); and present to a virtual network driver of the guest VF an interface that is backward compatible with a software network interface.

Hardware assisted virtual switch

Embodiments include apparatuses, methods, and systems including one or more servers and one or more storage devices, coupled with each other, to provide virtual storage service to store a file and meta data of the file for a client computing device. The file and the meta data of the file may be encrypted by the client computing device before providing to the virtual storage service. The file may be encrypted with a secret key of the client computing device, and the meta data of the file may be encrypted with a shared session key between the client computing device and the virtual storage service. The encrypted file may be stored in the one or more storage devices, and the encrypted meta data of the file may be stored in one or more secured areas of the one or more servers. Other embodiments may also be described and claimed.

Virtual storage services for client computing devices

An embodiment of an electronic processing system may include a processor, persistent storage media communicatively coupled to the processor, a reconfigurable device communicatively coupled to the processor over a physically isolated trusted communication channel, a secure provisioner communicatively coupled to the processor and the reconfigurable device to provision a secure storage area and to securely store a remotely generated bitstream security key in the provisioned secure storage area, and a device configurer to configure the reconfigurable device with a remotely generated bitstream and the remotely generated bitstream security key. Other embodiments are disclosed and claimed.

Reconfigurable device bitstream key authentication

Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.

There is disclosed in one example a computing apparatus, including: a hardware platform configured to communicatively couple with a multi-tenant cloud service, the multi-tenant cloud service including an oversubscribable resource; and a service assurance for oversubscribable resource (SAOR) engine configured to: receive tenant subscriptions to the oversubscribable resource, wherein tenant subscriptions exceed available instances of the oversubscribable resource; receive per-tenant quality of service (QoS) metrics for the oversubscribable resource; receive an allocation request from a guest for allocation of an instance of the oversubscribable resource; compare the request to currently-available instances of the oversubscribable resource; determine that the oversubscribable resource has capacity to service the request according to the QoS metrics of the tenant; and allocate an instance of the oversubscribable resource to the guest.

Oversubscribable resource allocation

Technologies for managing a single-producer and single-consumer ring include a producer of a compute node that is configured to allocate data buffers, produce work, and indicate that work has been produced. The compute node is configured to insert reference information for each of the allocated data buffers into respective elements of the ring and store the produced work into the data buffers. The compute node includes a consumer configured to request the produced work from the ring. The compute node is further configured to dequeue the reference information from each of the elements of the ring that correspond to the portion of data buffers in which the produced work has been stored, and set each of the elements of the ring for which the reference information has been dequeued to an empty (i.e., NULL) value. Other embodiments are described herein.

Technologies for managing single-producer and single consumer rings

There is disclosed in an example, an endpoint apparatus for an interconnect, comprising: a mechanical and electrical interface to the interconnect; and one or more logic elements comprising an interface vector engine to: receive a first scalar transaction for the interface; determine that the first scalar transaction meets a criterion for vectorization; receive a second scalar transaction for the interface; determine that the second transaction meets the criterion for vectorization; vectorize the first scalar transaction and second scalar transaction into a vector transaction; and send the vector transaction via the electrical interface.

System and method for vector communication

Growing community of inventors

Shanghai, China

Cunming Liang