Yangtze Memory Technologies Co., Ltd.

Cuicui Kong

Wenxi Zhou

Kun Zhang

Zhong Zhang

Linchun Wu

Zhiliang Xia

Yuancheng Yang

Di Wang

ZongLiang Huo

Yuhui Han

Bingjie Yan

Aspects of the disclosure provide a semiconductor device. The semiconductor device includes a stack of conductive layers and insulating layers stacked alternatingly in a first direction. The stack of conductive layers and insulating layers has a first side and a second side in the first direction. The semiconductor device then includes a semiconductor layer at the first side of the stack of conductive layers and insulating layers, and a first isolation structure extending through, in the first direction, the semiconductor layer and a subset of the stack of conductive layers and insulating layers. The subset of the stack of conductive layers and insulating layers includes a first conductive layer. The first isolation structure separates a first portion of the first conductive layer from a second portion of the first conductive layer.

Memory system, semiconductor device and fabrication method therefor

A three-dimensional memory includes a stack structure, a dummy structure and a gate line slit. The stack structure includes gate line layers and isolation layers stacked alternatively in the vertical direction. The dummy structure includes a first dummy section and a second dummy section. The gate line slit has one end extending into a gap formed by at least one of the first dummy section or the second dummy section. At least one of the first dummy section and the second dummy section partially overlaps a projection of the gate line slit onto the horizontal plane to realize connection between the dummy structure and the gate line slit.

Three-dimensional memory and manufacturing method thereof

Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack, a semiconductor layer, a supporting structure, a spacer structure, and a contact structure. The memory stack includes interleaved conductive layers and dielectric layers and includes a staircase region in a plan view. The semiconductor layer is in contact with the memory stack. The supporting structure overlaps the staircase region of the memory stack and is coplanar with the semiconductor layer. The supporting structure includes a material other than a material of the semiconductor layer. The spacer structure is outside the memory stack and is coplanar with the supporting structure and the semiconductor layer. The contact structure extends vertically and is surrounded by the spacer structure.

Three-dimensional memory devices with supporting structure for staircase region and spacer structure for contact structure and methods for forming the same

A three-dimensional (3D) memory device includes a doped semiconductor layer, a stack structure, and a channel structure. The stack structure includes interleaved conductive layers and dielectric layers formed on the doped semiconductor layer. The conductive layers include a plurality of word lines, and a drain select gate line. The channel structure extends through the stack structure along a first direction and is in contact with the doped semiconductor layer. The drain select gate line includes a first dielectric layer in contact with the channel structure, and a first polysilicon layer in contact with the first dielectric layer.

Three-dimensional memory device and method for forming the same

Embodiments of 3D memory devices having a concentric staircase structure and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a concentric staircase structure in an intermediate of the memory array structure. The concentric staircase structure includes a plurality of concentric zones in a radial direction in a plan view. Each of the plurality of concentric zones includes a plurality of stairs in a tangential direction in the plan view.

Growing community of inventors

Wuhan, China

Cuicui Kong