Nxp Usa, Inc.

Nxp B.v.

Cambridge Silicon Radio Limited

Cristian Pavao Moreira

Birama Goumballa

Didier Salle

Olivier Vincent Doare

Jean-Stephane Vigier

Matthis Bouchayer

Gilles Montoriol

Pierre Pascal Savary

Alphons Litjes

Alexander Vogt

Dominique Delbecq

Andres Barrilado Gonzalez

Olivier Vincent Doaré

Stephane Damien Thuries

Ulrich Moehlmann

Julien Orlando

Andreas Johannes Köllmann

Thierry Mesnard

Nicolas Sornin

Hendrik Johannes Bergveld

Antonius Johannes Matheus De Graauw

Matthias Rose

Pasquale Lamanna

Maarten Lont

Davide Orifiamma

Michiel Alexander Hallie

Charaf Eddine Souria

Stephane Thuriés

Hugo Albert Vallee

Olivier Doaré

An integrated circuit (IC) includes circuitry in a plurality of power domains for transmitting and/or receiving radar chirp frames and first and second monitoring systems for monitoring supply voltages of a first and a second subset of the plurality of power domains, respectively. The first subset is monitored outside of a time window during which a chirp frame is transmitted and/or received utilizing circuitry of the IC, and the second subset is monitored during the time window. The first monitoring system includes an output for an error signal indicating a supply voltage in the first subset does not comply with a first voltage parameter. The second monitoring system includes a unique monitoring circuit for each power domain in the second subset, and each unique monitoring circuit includes an output for an error signal indicating a supply voltage in the second subset does not comply with a second voltage parameter.

Hybrid supply monitoring system for a radar device

Systems and methods are provided for performing both wireless communications and wireless sensing in combination. The systems include at least a first base station having at least one antenna device where the antenna device includes a beamformer control unit that uses a modifiable lookup table to control beam characteristics. The system may send a first set of electromagnetic sensing beams to a first environmental area within a field of view of the at least one antenna device to detect environmental objects within the environmental area. Based on data received by the antenna device, the system may generate a modified lookup table.

Apparatus and methods for optimizing combined sensing and communications systems

Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the method includes sending, from a first antenna device of a base station (BS), a plurality of first wireless communication signals respectively during a first plurality of time periods associated respectively with a first plurality of symbols and also a plurality of first wireless sensing signals respectively during a second plurality of time periods associated respectively with a second plurality of symbols. Also, the method includes receiving, at the antenna device, a plurality of second wireless communication signals respectively during a third plurality of time periods associated respectively with a third plurality of symbols and also a plurality of second wireless sensing signals respectively during the second plurality of time periods. The second plurality of time periods are interleaved among respective pairs of the first plurality of time periods.

System and method for combined performing of wireless communication and sensing

Systems and methods for performing both wireless communications and wireless sensing in combination are disclosed herein. In one example embodiment, the system includes a base station (BS) including each of at least one antenna device including a first antenna device and at least one control unit. The control unit includes an input port coupled at least indirectly to the first antenna device, an output port, and a controllable circuit including each of a spillover cancellation circuit and a bypass circuit. The BS is configured to operate in each of a communication mode and a sensing mode. When the BS operates in the sensing mode, the spillover cancellation circuit of the controllable circuit is enabled and performs spillover cancellation. When the BS operates in a communication mode, the bypass circuit operates so that the spillover cancellation circuit is bypassed or otherwise does not affect how the output signal is generated.

A communication unit includes a plurality of cascaded devices that include at least one master device and at least one slave device configured in a master-slave arrangement. The at least one master device and at least one slave device each include: a demodulator circuit configured to receive a distributed reference clock signal and re-create a system clock signal therefrom; a clock generation circuit that includes an internally-generated reference phase locked loop configured to receive the re-created system clock signal to create a master-slave clock signal; and an analog-to-digital converter, ADC, coupled to the reference phase locked loop and configured to use a same master-slave clock signal to align respective sampling instants between each ADC of the at least one master device and at least one slave device.

Communication unit, integrated circuits and method for clock and data synchronization

Radar System The disclosure relates to a radar system having multiple radar transceiver modules, in which each module has a clock signal that is synchronised with a clock signal generated by a leader transceiver module. Example embodiments include a radar system () comprising a plurality of radar transceiver modules () mounted to a common PCB (), the plurality of radar transceiver modules comprising a leader module () and one or more follower modules (), the leader module () comprising a first oscillator () configured to provide a first clock signal at a first frequency to each follower module (), each of the leader and follower modules comprising a phase locked loop, PLL, clock signal generator (), the PLL clock signal generator () comprising a divide by n clock divider () arranged to output 2n phase shifted clock signals () at a third frequency and a multiplexer () connected to receive the 2n phase shifted clock signals from the divide by n clock divider () and output a third clock signal () selected by an input phase select signal ().

Radar system

A radar system includes a hybrid-power amplifier and a power control unit coupled to the hybrid-power amplifier. The power control unit is configured to control the amplification of a chirp signal output by the radar system based upon an assessment of an interchirp time provided by a chirp profile. The interchirp time is a time difference between a first chirp signal and a second chirp signal that are to be output by the hybrid-power amplifier. When the power control unit determines that the interchirp time is less than an interchirp time threshold, a fast-power loop control configuration is used to control the transmitted output power at hybrid amplifier level. When the power control unit determines that the interchirp time is equal to or greater than the interchirp time threshold, a slow-power loop configuration or a combination of the slow-loop configuration and the fast-loop configuration is used to control the transmitted output power at the hybrid-power amplifier. A look-up table generated by the power control unit in a controller is used to ascertain the control signals and values that are to be used by the hybrid-power amplifier and voltage regulator to amplify the chirp signal.

Power control for radar applications and method thereof

An electronic device includes a bias generator to generate a plurality of bias currents and a testing module to test the bias generator by successively testing each subset of bias currents of a plurality of subsets of bias currents grouped from the plurality of bias currents as a corresponding single test current. The testing module can include a variable resistor, wherein the testing module is to test the bias generator by, for each subset of bias currents, configuring the variable resistor to have a corresponding resistance based on the number of bias currents represented in the subset, conducting a corresponding test current through the variable resistor configured to the corresponding resistance, the test current representing a combination of all bias currents of the corresponding subset, and determining a test status for the subset of bias currents based on a voltage across the variable resistor resulting from the corresponding test current.

Bias generator testing using grouped bias currents

In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.

Battery management system and method

In accordance with a first aspect of the present disclosure, a radar unit is provided, comprising: a receiver circuit configured to receive a radar signal; a controller configured to control said receiver circuit, wherein said controller is configured to cause said receiver circuit to operate either in a complex receiver mode or in a real receiver mode. In accordance with a second aspect of the present disclosure, a method of operating a radar unit is conceived, comprising: receiving, by a receiver circuit comprised in the radar unit, a radar signal; controlling, by a controller comprised in said radar unit, said receiver circuit, wherein said controller causes said receiver circuit to operate either in a complex receiver mode or in a real receiver mode.

Radar unit and corresponding operating method

The disclosure relates to apparatus and methods for self-testing of a duty cycle detector. Example embodiments include a circuit () comprising: a clock signal generator () configured to provide an output clock signal () having a duty cycle; a duty cycle detector () arranged to receive the output clock signal () and provide an output flag if the duty cycle of the clock signal () is outside a predetermined range; a controller () arranged to provide a duty cycle select signal () to the clock signal generator () to cause the clock signal () to have a duty cycle outside the predetermined range and to receive the output flag to confirm operation of the duty cycle detector ().

Duty cycle detector self-testing

The disclosure relates to a radar transceiver having a transmitter comprising a phase shifter. Example embodiments include a radar transceiver () having a normal mode of transmitter operation and a self-test mode of operation, the transceiver () comprising: a digital controller () configured to provide a digital control signal indicative of a phase shift; a digital to analogue converter () configured to receive the digital control signal and provide an analogue signal in accordance with the phase shift; a phase shifter () configured to receive the analogue signal and provide a phase shifted output signal for transmission; a dummy load () connected to receive the analogue signal from the digital to analogue converter () and to provide an analogue output; a resistor network () connected across an output of the dummy load (); a testing module () configured to measure the analogue output of the dummy load (); and a controller module () configured to control operation of the dummy load (), testing module () and digital controller () during the self-test mode of operation by: enabling the dummy load (); operating the digital controller () to provide a range of digital control signals to the digital to analogue converter (); and operate the testing module () to measure the analogue output of the dummy load () to determine a measure of linearity of the digital to analogue converter ().

Radar transceiver

A radar device () is described that includes at least one transceiver () configured to support frequency modulated continuous wave (FMCW); radar device () and a digital controller (). A temperature sensor system includes a plurality of temperature sensors () coupled to one or more circuits () in the at least one transceiver (). The digital controller () comprises or is operably coupled to an over-temperature emulation circuit () configured to emulate an over-temperature shutdown state by injecting an over-temperature force signal () into the temperature sensor system ().

Temperature sensor system, radar device and method therefor

A communication unit () is described that includes a plurality of cascaded devices that includes at least one master device and at least one slave device configured in a master-slave arrangement. The at least one master device comprises a modulator circuit () configured to: receive a system clock signal and a frame start signal; modulate the system clock signal with the frame start signal to produce a modulated master-slave clock signal (); and transmit the modulated master-slave clock signal () to the at least one slave device. The at least one slave device comprises a demodulator circuit () configured to: receive and demodulate the modulated master-slave clock signal (); and re-create therefrom the system clock signal () and the frame start signal ().

Communication unit and method for clock distribution and synchronization

A communication unit () is described that includes a plurality of cascaded devices that comprise at least one master device () and at least one slave device () configured in a master-slave arrangement. The at least one master device () and at least one slave device () each comprise: an analog-to-digital converter, ADC, () configured to use a same re-created system clock signal () to align respective sampling instants between each ADC (). The at least one master device () comprises: a clock generation circuit comprising an internally-generated reference phase locked loop circuit (), configured to output a system clock signal (); and a modulator circuit () coupled to the clock generation circuit and configured to receive and distribute the system clock signal (). The at least one master device () and at least one slave device () each comprise: a demodulator circuit () configured to receive the distributed system clock signal () and re-create therefrom a synchronized system clock signal () used by a respective ADC, () of each of the the master device () and at least one slave device ().

Growing community of inventors

Frouzins, France

Cristian Pavao Moreira