Infineon Technologies Ag

Infineon Technologies Austria Ag

Universitá Degli Studi Di Padova

Cristian Garbossa

Enrico Orietti

Marco Flaibani

Marco Piselli

Luca Scandola

Emanuele Bodano

Stefano Orlandi

Andrea Vecchiato

Vlad Alexandru Mircea Ionescu

Michele Bergo

Alberto Arpino

Ozan Serpedin

Michael Lenz

Simone Massaro

Fabio Ballarin

Bejoy Mathews

Silvia Solda

Bernhard Wotruba

Davide Dal Bianco

Andrea Zuccollo

Maurizio Inversi

Winand Van Sloten

Cristina Chiereghin

Andrea Morra

Konstantin Ivanchenko

Cristian Stefan Zegheru

Paola Lops

Giorgio Spiazzi

Stefano Cabizza

Luca Lentola

Marco Vanin

Bogdan Dimitriu

Ionut-Alin Ilie

Devis Fiorin

Dario Cappuzzo

An active-clamped isolated SEPIC DC-DC power converter (ACISC) to convert a DC voltage to supply a variety of DC loads. The single-ended primary-inductor converter (SEPIC) of the ACISC may be configured to perform both buck and boost converter functions. The ACISC of this disclosure may be configured to operate over a wide input voltage range to provide an output voltage for DC electronic loads supplied by the power converter. In the example of an automobile, a back-up twelve volt battery may output voltages to the ACISC over a wide voltage range, e.g., nine volts to eighteen volts. The wide input voltage range of the ACISC may be desirable when used as the converter for a back-up battery supply. The circuitry arrangement and component selection of the ACISC of this disclosure cause the power converter to operate in resonant DCM mode in the megahertz (MHz) frequency range.

Active-clamped isolated sepic converter in the MHz range for low-power subnets

A system topology may use intentional signal injection to monitor one or more power supply circuits that may supply electrical power to components of the system. The system topology may include voltage monitoring circuitry to monitor the output of the power supply. In some examples, a power supply rail fault may happen either inside or outside of the power supply circuit, but not be detectable by the voltage monitoring circuitry. Injecting a check signal in the presence of an actual fault, may cause oscillations at the output node of the power supply detectable by the voltage monitoring circuitry. Once the check signal, combined with the fault signal, at the output node reaches the monitoring threshold detectable by the voltage monitoring circuitry, the voltage monitoring circuitry may output an indication of the fault to processing circuitry of the system.

Functional safety mechanism for detection of a fault in a leadframe

In some examples, a device includes a selector circuit configured to deliver power to a first driver circuit, where the first driver circuit is configured to activate and deactivate a first switch of a postregulator. The device also includes a startup regulator and a controller configured to cause the selector circuit to deliver power from the startup regulator to the first driver circuit. The controller is also configured to determine that a boost regulator is operational after delivering power from the startup regulator to the first driver circuit. The controller is further configured to cause the selector circuit to deliver power from the boost regulator to the first driver circuit in response to determining that the boost regulator is operational.

Power delivery to a driver circuit in a postregulator

This disclosure includes systems, methods, and techniques for controlling a semiconductor device of a power converter. For example, a circuit includes first control circuitry configured to receive an indication of a first voltage which represents a voltage output from a power source to the power converter. Additionally, the first control circuitry is configured to output a control signal to second control circuitry in order to control, based on the first voltage and the second voltage, the semiconductor device so that a second voltage is lower than the first voltage, wherein the second voltage represents a voltage output from the power converter to a load.

Circuit for controlling an output of a power converter

A method of operating a power protection system coupled between a power source and a power converter includes producing, by a controller of the power protection system, a driving signal to a cut-off switch of the power protection system to electrically couple the power source to the power converter; detecting, by the controller of the power protection system, a fault condition of the power converter while the power converter is in operation, where the detecting includes detecting, by the controller of the power protection system, that a current flowing through the cut-off switch is above a pre-determined threshold while a gate control signal from the power converter indicates an OFF state for a first current path of the power converter; and in response to detecting the fault condition, turning off, by the controller of the power protection system, the cut-off switch to isolate the power source from the power converter.

Protection circuit with a cut-off switch for power systems

A circuit may be configured detect current in different phases of an N-phase power converter. The circuit may comprise a first set of elements defining at least part of a first current loop associated with a first phase of the power converter, wherein the first set of elements is configured to detect current during the first phase of the power converter. In addition, the circuit may comprise a second set of elements defining at least part of a second current loop associated with a second phase of the power converter, wherein the second set of elements is configured to detect current during the second phase of the power converter when a duty cycle associated with the different phases is greater than 100/N, and wherein the first set of elements is configured to detect current during the second phase of the power converter when the duty cycle is less than 100/N.

Dynamic current detection loops for multiphase power converter

This disclosure describes a protection circuit configured to protect a power converter. The protection circuit may be configured to determine when the power converter is operating in a tristate mode, and upon determining that the power converter is operating in the tristate mode, to disable a supply to the power converter based on a comparison of a switch node voltage on a switch node of the power converter to a feedback node voltage on an output node of the power converter.

Safety cutoff circuit for power converter

Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.

Microcontroller and power management integrated circuit application clustering for safe state management

Differential control circuitry configured to control the operation of a power converter. The control circuitry of this disclosure is configured to receive two differential feedback signals from a fully differential amplifier. The amplifier receives an output voltage (Vout) from the switched mode power supply as well as a reference voltage (Vref). When Vout is less than Vref, the control circuitry may output a pulse width modulation (PWM) control signal to the switched mode power supply with a duty cycle of the PWM control signal based on a relative difference between a positive difference voltage and a negative difference voltage. When Vout is greater than Vref, the control circuitry may output a pulse frequency modulation (PFM) control signal to the switched mode power supply with a switching time of the PFM control signal based on a relative difference between the positive difference voltage and the negative difference voltage.

Fully differential PWM/PFM power converter control

A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.

Low-dropout regulation of output voltage using first buffer and second buffer

A circuit for detecting failure of a device includes a plurality of monitoring modules. Each respective monitoring module of the plurality of monitoring modules is configured to generate a monitoring value at an output of the respective monitoring module based on a signal received at an input of the respective monitoring module. The circuit further includes a data selector module configured to couple, for each step of a switching cycle, the input of each of the plurality of monitoring modules to one of a plurality of function modules such that each of the plurality of monitoring modules generates the monitoring value for each of the plurality of function modules to generate monitoring information and evaluation logic configured to determine whether a failure has occurred at the plurality of function modules based on the monitoring information.

Detecting failure using multiple monitoring modules

A circuit to protect a digital input and output (I/O) terminal from an overvoltage applied externally to the digital I/O terminal. The circuit is arranged similar to a bootstrap switch such that a pass-device protects an output driver from an overvoltage applied to the digital I/O terminal and the output driver controls the operation of the pass-device, such as an N-channel metal-oxide semiconductor (NMOS) transistor. The circuit may include a capacitor and a diode coupled to the gate of the NMOS transistor. A digital zero from the output driver charges the capacitor. A digital one from the output driver causes the charged capacitor, coupled between source and the gate of the NMOS transistor, provides sufficient gate-source voltage to pass the digital one from the driver to the digital I/O terminal. The circuit further includes refresh circuitry configured to maintains the gate source voltage on the capacitor.

Efficient high-voltage digital I/O protection

A controller circuit for generating a Pulse-Width Modulation (PWM) signal for activating a switching device of a Switched-Mode Power Supply (SMPS) includes gap detection circuitry, Pulse Frequency Modulated (PFM) circuitry, PWM circuitry and logic circuitry. The gap detection circuitry is configured to generate a shift signal based on an indication of a voltage difference between a reference voltage and a feedback voltage corresponding to voltage output by the SMPS. The PFM circuitry is configured to generate a hold signal indicating a target PFM frequency for the PWM signal. The PWM circuitry is configured to shift, based on the shift signal, a pedestal current to generate a shifted pedestal current and to generate, based on the shifted pedestal current, a peak signal indicating a target PWM on time for the PWM signal.

Transient effect reduction for switched-mode power supply (SMPS)

A circuit includes a first regulation module, second regulation module, first monitoring module, and second monitoring module. The first regulation module is configured to generate, from a supply voltage, a first voltage. The second regulation module is configured to generate, from a first voltage, a second voltage that is less than the first voltage. The first monitoring module is configured to generate a first warning signal when the first voltage exceeds a first threshold and to generate the first warning signal when a first testing voltage exceeds the first threshold. The second monitoring module is configured to generate a second warning signal when the second voltage exceeds a second threshold and to generate the second warning signal when a second testing voltage exceeds the second threshold.

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Bressanone, Italy

Cristian Garbossa