Hewlett-packard Development Company, L.p.

Craig M Perlov

Carl Philip Taussig

Ping Mei

Christopher A Schantz

Warren Bruce Jackson

Albert Hua Jeans

Stephen R Forrest

Hao Luo

Angeles Marcia Almanza-Workman

Carol Jean Wilson

Terril N Hurst

Robert A Garcia

A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the thin film layers. An insulating or passivation layer can then be deposited on the gate lines and the transistors, so that column or data lines can be formed on the insulating layer.

Thin film device fabrication process using 3D template

A method of forming a thin film device on a flexible substrate is disclosed. The method includes depositing an imprintable material over the flexible substrate. The imprintable are stamped material forming a three-dimensional pattern in the imprintable material. A sacrificial layer is formed over the three-dimensional pattern. A conductive layer is deposited over the sacrificial layer. The sacrificial layer is removed, leaving portions of the conductive layer as defined by the three-dimensional pattern.

Method and system for forming a thin film device

Thin film devices and methods for forming the same are disclosed herein. A method for forming a thin film device includes forming a first at least semi-conductive strip located at a first height relative to a surface of a substrate, and forming a second at least semi-conductive strip adjacent to the first at least semi-conductive strip. The second strip is located at a second height relative to the substrate surface, and the second height is different than the first height. A nano-gap is formed between the first and second at least semi-conductive strips.

Thin film devices and methods for forming the same

Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Embossed mask lithography

The present invention provides for a common substrate with multiple sections, each constituting a separate layer of a memory device. Fold lines are arranged on the substrate to define separate sections and to provide a means for folding the sections on each other to form a multiple-layer memory device. In one application, a substrate has a fold line formed by alterations to the substrate material to form a fold line on the substrate. A first conductor section is formed with an array of parallel conductors or wires spaced across the section. A second section on the common substrate has an array of parallel conductors or wires spaced across the second section, the conductors being perpendicular to the conductors on the first section. The first and second sections are folded along the fold line over on top of each other, after a semiconductor layer has been deposited on one or both of the conductor layers, thereby forming a matrix of memory cells. The fold line is formed by removal of some of the material, such as by perforations or depressions, by deforming the material, such as by creasing, or by altering a property of the material, such as by changing the strength or flexibility of the substrate material. The conductors or the first section may also be fabricated with narrowing cross-section areas at points where fuses are to be set to an open circuit.

Fabrication and assembly structures and methods for memory devices

Multi-section foldable memory device

Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.

Large line conductive pads for interconnection of stackable circuitry

A donor/acceptor-organic-junction sheet employed within an electronic memory array of a cross-point diode memory. The donor/acceptor-organic-junction sheet is anistropic with respect to flow of electrical current and is physically unstable above a threshold current. Thus, the volume of the donor/acceptor-organic-junction sheet between a row line and column line at a two-dimensional memory array grid point serves both as the diode component and as the fuse component of a diode-and-fuse memory element and is electrically insulated from similar volumes of the donor/acceptor-organic-junction sheet between neighboring grid point intersections.

Diode-and-fuse memory elements for a write-once memory comprising an anisotropic semiconductor sheet

A memory cell comprises at least two antifuses in series with a diode. Each antifuse expresses a different resistance from the others when blown, and each requires an escalating programming voltage over the last to be programmed. The antifuse structures differ in their respective geometries and materials so that a low programming voltage will blow the more sensitive fuse first, and a higher voltages will program the lesser sensitive fuses thereafter.

Multi-bit PROM memory cell

The invention includes a memory cell apparatus, and a method of forming the memory cell. The memory cell apparatus includes a flexible hybrid memory element. The flexible hybrid memory element includes a flexible first conductive layer formed adjacent to a flexible substrate. A flexible diode structure is formed adjacent to the flexible first conductor. A flexible switch is formed adjacent to the flexible diode structure. A flexible second conductive layer is formed adjacent to the flexible switch. The flexible switch is generally formed from an organic material. The flexible diode structure is generally formed from a disordered, inorganic material. The flexible switch can be formed to create a high resistance path when a threshold amount of current is passed through the flexible switch, or the flexible switch can be formed to create a low resistance path when a threshold amount of current is passed through the flexible switch. The method includes depositing a flexible first conductive layer on a flexible substrate. A flexible disordered inorganic material is deposited on the flexible first conductor forming a plurality of flexible diode structures. A flexible organic material is deposited on the flexible disordered inorganic material, forming a plurality of flexible switches adjacent to the plurality of flexible diode structures. A flexible second conductor is deposited on the flexible organic material.

Flexible hybrid memory element

A data storage device is disclosed that comprises a cross-point memory array formed on a dielectric substrate material. The cross-point memory array comprises first and second sets of transverse electrodes separated by a storage layer including at least one semiconductor layer. The storage layer forms a non-volatile memory element at each crossing point of electrodes from the first and second sets. Each memory element can be switched between low and high impedance states, representing respective binary data states, by application of a write signal in the form of a predetermined current density through the memory element. Each memory element includes a diode junction formed in the storage layer, at least whilst in the low impedance state. A plurality of the data storage devices can be stacked and laminated into a memory module providing inexpensive high capacity data storage. Such a memory module can be employed in an archival data storage system in which the memory module provides a write-once data storage unit receivable in an appliance or interface card.

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San Mateo, CA, United States of America

Craig M Perlov