Silicon Laboratories Inc.

Qualcomm Incorporated

Rockwell International Corporation

Mindspeed Technologies, Inc.

Craig E Borden

Sverrir Olafsson

Charles F Raasch

Burk Beadle

Andrew B Webster

Nimesh Doshi

Robert T Otten

Tirdad Sowlati

Chang Ki Kwon

Steve John Halter

Alexander Dougald Taylor

Mishel Matloubian

Chih-Shun Ding

Miguel A Martinez

Steve Majors

Steve J Halter

Methods and implementation of low-power power-on control circuits are disclosed. In a particular embodiment, a computer readable tangible medium stores instructions executable by a computer. The instructions may be executable by the computer to determine whether a power detector circuit powered by a first voltage supply has received a test input from at least one voltage level-shifting device coupled to a second voltage supply.

From a voltage level-shifting device determining a status of a voltage supply based on a test input

Methods and implementation of low-power power-on control circuits are disclosed. In a particular embodiment, an apparatus includes a power detector circuit powered by a first voltage supply. At least one voltage level-shifting device is coupled to a second voltage supply and a test input is provided to the power detector circuit. An optional leakage self-control device may reduce unwanted leakage currents associated with the first supply and the second supply.

Methods and implementation of low-power power-on control circuits

A modem to modem communication system supports call waiting services by exchanging hold request and acknowledge signals before relinquishing the line servicing incoming calls. Thereafter, the modem to modem session is reestablished without having to redial. The hold request may be denied or accepted, and may define the duration a modem will hold before hanging up. The holding modem maintains the session by fooling the higher protocol layers, making them believe that the modem is not on hold. Three-way calling services are also used to free up the shared line for outgoing calls while maintaining the session with holding modems. A table may be employed to screen incoming calls through a comparison of the caller ID information with that in the table. The table may be within the modem or the host computer. A quick startup procedure for a modem system utilizes known characteristics of a previously established communication channel to reduce the initialization period associated with subsequent connections over the same channel.

Modem with hold and quick connect functionality

A modem to modem communication system supports call waiting services by exchanging hold request and acknowledge signals before relinquishing the line servicing incoming calls. Thereafter, the modem to modem session is reestablished without having to redial. The hold request may be denied or accepted, and may define the duration a modem will hold before hanging up. The holding modem maintains the session by fooling the higher protocol layers, making them believe that the modem is not on hold. Three-way calling services are also used to free up the shared line for outgoing calls while maintaining the session with holding modems. A table may be employed to screen incoming calls through a comparison of the caller ID information with that in the table. The table may be within the modem or the host computer.

Use of modem on hold for network management and telephone access

Using modems to place modem connections on hold and to maintain upper layer network connection

A semiconductor die includes at least one process monitoring circuit for evaluating at least one process parameter of the semiconductor die. The at least one process monitoring circuit can include a first group of process monitoring circuits for monitoring NFET speed and a second group of process monitoring circuits for monitoring PFET speed. The process monitoring circuits can be distributed at the corners of the semiconductor die. The semiconductor die further includes a voltage control circuit configured to store optimum voltage information corresponding to the at least one process parameter. The voltage control circuit is further configured to selectively provide the optimum voltage information to a system power supply. The voltage control circuit includes a calculated optimum voltage register that stores the optimum voltage information corresponding to the at least one process parameter.

Semiconductor die with process variation compensated operating voltage

Modem on hold

A fault isolation system for use in an integrated circuit. The fault isolation system includes multiple input shift registers which are connected end-to-end, serial output to serial input, for convenient interface with a test data input and test data output that are controlled by the test access port controller (tap controller) of conventional JTAG circuitry that is frequently provided in such integrated circuits. The multiple input shift registers include parallel inputs which receive test data from test nodes within functional blocks such as general circuit blocks and linear bus alleys. The multiple input shift registers are efficiently controlled by a global controller which talks to many local controllers. The global controller distributes control signals that are received by the local controllers. The multiple input shift registers thereafter operate in accordance with the control signals and, in order to operate 'at speed,' also operate in time coordination with the local clock phases driving the functional block under observation. The multiple input shift registers preferably include polynomial feedback taps in order to generate a predictable 'signature' given a sequential set of parallel data subsequent to initiation to a known state.

Internal testability system for microprocessor-based integrated circuit

Growing community of inventors

Placentia, CA, United States of America

Craig E Borden