Nortel Networks Corporation

Ciena Corporation

Apple Inc.

Northern Telecom Limited

Craig Donald Suitor

Christopher John Brown

Balwantrai Mistry

Craig Warren Parker

Doug Wong

Richard Glenn Kusyk

Glenn G Algie

Matthew Yuen

Alexander Young

Bruce Irwin Dolan

Stuart C White

Sitaram Patro

Eric C Valk

Richard G Murphy

Richard G Kusyk

Sandra Fougere

David Yeung

Rodger J Williams

Charlie Kawwas

Brodie Gage

A network element includes at least two Time Division Multiplexing (TDM) modules each including a TDM client interface, TDM processing circuitry, and circuit emulation circuitry; and a packet switch fabric connected to the at least two TDM modules in a Link Aggregation Group (LAG) for a protected TDM service, and configured to output a packet interface, wherein the protected TDM service is provided as a single packetized TDM stream via the packet interface from the packet switch fabric.

Legacy time division multiplexing (TDM) service support in a packet network and on a packet network element

A network element includes at least two Time Division Multiplexing (TDM) modules each including a TDM client interface, TDM processing circuitry, and circuit emulation circuitry; and a packet switch fabric connected to the at least two TDM modules and configured to output a packet interface, wherein a protected TDM service through the at least two TDM modules is provided as a single packetized TDM stream via the packet interface from the packet switch fabric.

A communications network includes multiple distributed nodes that are coupled by a circuit-switched network. To improve efficiency, a plurality of the nodes are associated with a single source synchronization block that injects timing messages over circuits in the circuit-switched network to the plurality of nodes. Each of the plurality of nodes is associated with a timing extraction and recovery block that extracts information from the timing messages injected by the source synchronization block to synchronize a local clock in each node to the frequency and phase of a clock received by the source synchronization block.

Providing a timing source for multiple nodes coupled to a circuit-switched network

Described is a system and method of protection switching in an Ethernet network. First and second point-to-point Ethernet links are established to data equipment. Identical streams of Ethernet traffic are received at a first Ethernet port and at a second Ethernet port. The stream of Ethernet traffic being received at the first Ethernet port is transmitted to the data equipment over the first point-to-point Ethernet link, while the second Ethernet port is prevented from transmitting the stream of Ethernet traffic received at the second Ethernet port. During a protection switch, transmission of Ethernet traffic ceases over the first point-to-point Ethernet link, and commences over the second point-to-point Ethernet link, the second Ethernet port transmitting the stream of Ethernet traffic being received at the second Ethernet port to the data equipment.

Ethernet facility and equipment protection

Described is a network element for a communications network. Management communications with the network element occur using a single IP address. The network element includes two shelf processors each having a negotiations module. One of the shelf processors has a master status and the other shelf processor has a slave status. A backplane in communication with the shelf processors allows the negotiations modules to exchange data and to determine whether one of the shelf processors has experienced a fault. If a fault is determined in the master shelf processor, the slave shelf processor becomes the master shelf processor and the master shelf processor becomes the slave shelf processor.

Single IP address for redundant shelf processors

A system and method for configuring a network element to support protection switching in an optical network are described. The network element can operate according to the SONET, SDH, or both optical transport standards. Each tributary card of the network element has a baseline set of triggering parameters for supporting each protection scheme of both optical transport standards. A baseline parameter set for a given protection scheme has those triggering parameters that are common to SDH and SONET optical transport standards. One or more additional triggering parameters may be needed by a tributary card to complete the implementation of a particular protection scheme. These additional triggering parameters can be sent to the tributary cards, as needed, to supplement the baseline parameter sets.

System and method for configuring a network element to support protection switching in an optical network

A system and method for routing operations, administration, and maintenance traffic for an optical network are described. A subset of a routing information set is transmitted to tributary cards of a network element. The tributary cards route operations, administration, and management traffic based on the subset of the routing information.

System and method for routing traffic in an optical network

A multi-service network element is configurable for use in various types of communications networks. The network element has a service interface card, a service interface electrical connector for receiving the service interface card, an I/O electrical connector for receiving an I/O module, and a backplane. The backplane has a first side, an opposite side, a first means for electrically connecting the service interface electrical connector to the first side, and a second means for electrically connecting the I/O electrical connector to either side of the backplane. The backplane is partitioned into columns and rows of electrical connectors. Each column corresponds to a card slot for receiving a circuit pack and each row corresponds to a section of the backplane having traces for carrying a particular type of electrical signals between circuit packs.

Backplane architecture for enabling configuration of multi-service network elements for use in a global variety of communications networks

A system identification module for storing system specific information is described. The system includes a housing, a module connector and a persistent memory for storing system specific data associated with a communications system having a backplane. The housing and the module connector define an enclosure surrounding the persistent memory. The module connector can be electrically coupled to and removed from the backplane connector. The persistent memory can be a programmable read-only memory device. System specific information such as the system serial number, the date of manufacture, the system vintage and the common language equipment identifier (CLEI) code can be remotely accessed using the system identification module.

System identification module for a communications system

Optical network element panel

The present invention is directed to a shelf for housing PCPs. A backplane extends across the shelf. A connector module having the OAM&P connectors is electrically connected to the backplane and has two positions. In one position it extends sideways from the shelf with the connectors in a front to rear direction. In the second position, the OAM&P connector module is substantially flush with the side of the shelf.

Hinged removable connector module

A shelf for housing printed circuit packs in which a backplane has a connector along its top or bottom edge. Connector modules are connected to the backplane by vertical attachment to the backplane edge connector such that the connector modules are located above or below the backplane. The connector modules may be oriented either to be front facing or rear facing. The backplane connector is adapted to accept modules of varying widths and having different connectors thereon.

Flexible cable I/O module system

The invention substantially reduces the occurrence of unnecessary synchronization rearrangements in nodes within synchronous transmission systems such as SONET networks. In one embodiment of the invention, the method disclosed for reducing synchronization rearrangements within interconnected nodes of a synchronous transmission system includes the steps of: detecting, at a node within the synchronous transmission system, a change in a synchronization status message received at the node; propagating the changed synchronization status message from the node to another node within the synchronous transmission system if the changed synchronization status message corresponds to an active timing reference; waiting a specified amount of time upon detection of the change in the synchronization status message; then determining whether a synchronization rearrangement is necessary at the node; and then performing a synchronization rearrangement at the node if necessary. In another embodiment of the invention, the method disclosed for reducing synchronization rearrangements within interconnected nodes of a ring transmission system, includes the steps of: updating a synchronization status message upon a change in synchronization signal quality at a first node of the ring transmission system; transmitting the updated synchronization status message from the first node to a plurality of other nodes within the ring transmission system; propagating the updated synchronization status message from each of the plurality of other nodes to another node of within the ring transmission system if the updated synchronization status message corresponds to an active timing reference; waiting a specified amount of time upon an arrival of the updated synchronization status message at each of the plurality of other nodes; determining for each of the plurality of other nodes whether a synchronization rearrangement is still necessary; and then performing a synchronization rearrangement if necessary.

Method of reducing synchronization rearrangements in synchronous transmission systems

An alarm signal processing circuit is provided for an integrated circuit having alarm signal generating circuitry for generating alarm signals having active and inactive states, and for connecting to a microprocessor. An alarm signal is stored in an alarm register which stores an inactive alarm signal until receipt of an active alarm signal, whereupon it stores the active alarm signal until receipt of an alarm register reset signal from the microprocessor. The alarm signal is also detected by an alarm detector which generates an event signal which is active when the alarm signal changes its status. An event register stores an inactive event signal until receipt of an active event signal, whereupon it stores the active event signal until receipt of an event register reset signal from the microprocessor. The event register outputs an event interrupt signal which is active when the stored event signal is active. The event interrupt signal is output by an event interrupt output means for use by the microprocessor. The event interrupt output means is controlled by an event enable register which stores an event enabling signal or an event disabling signal in response to an event enable control signal received from the microprocessor. The event interrupt output means is enabled to output an active event interrupt signal when the event enable register stores the event enabling signal, and disabled from outputting the active event interrupt signal when the event enable register stores the event disabling signal. The alarm register and the event register are accessible by the microprocessor to read the stored alarm signal or the stored event signal.

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Nepean, Canada

Craig Donald Suitor