Motorola Corporation

Nxp Usa, Inc.

Craig C Hunter

Bryan D Marietta

Joseph Gergen

Russell A Reininger

David W Todd

Thomas S Spohrer

Benjamin Charles Eckermann

David C Holloway

A system and methods controlling wake events in a data processing system is described. A broadcast wake-up signal staggering order is determined in response to a first wake event. A staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the broadcast wake-up signal staggering order. The broadcast wake-up signal staggering order is changed in response to a second wake event. And a changed staggered broadcast wake-up signal is distributed to a plurality of processing elements based on the changed broadcast wake-up signal staggering order.

Method and apparatus for controlling wake events in a data processing system

A scan based test methodology generates conventional functional clocks (CLK1 and CLK2) and test clocks (CLKA and CLKB) from a single input clock (GCLK). The methodology allows an integrated circuit (10) designed according to it to be tested at the part's operating frequency. Also, the test methodology is compatible with known test methodologies such as level sensitive scan design ('LSSD'). The pre-existing body of test programs and equipment can be used with a circuit incorporating the invention. The single clock requirement also simplifies design.

Clock scan design from sizzle global clock and method therefor

A CMOS implementation of a Built In Self Test Input Generator (BISTIG) for testing embedded PLA structures. The BISTIG tests for all stuck at faults, cross-point faults and bridging faults, by asserting exactly one input row and exactly one product term of the PLA under test at a time.

CMOS implementation of a built-in self test input generator (BISTIG)

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Austin, TX, United States of America

Craig C Hunter