Icemos Technology Corporation

Analog Devices,inc.

Cormac MacNamara

Robin Wilson

Conor Brogan

Hugh J Griffin

William Andrew Nevin

Hiugh J Griffin

Graeme Peters

A positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode includes a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate is of a first conductivity. The PIN/NIP diode includes at least one trench formed in the first main surface which defines at least one mesa. The trench extends to a first depth position in the semiconductor substrate. The PIN/NIP diode includes a first anode/cathode layer proximate the first main surface and the sidewalls and the bottom of the trench. The first anode/cathode layer is of a second conductivity opposite to the first conductivity. The PIN/NIP diode includes a second anode/cathode layer proximate the second main surface, a first passivation material lining the trench and a second passivation material lining the mesa. The second anode/cathode layer is the first conductivity.

Positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode

A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the first main surface of the semiconductor substrate. A device layer has a first main surface and a second main surface. The second main surface of the device layer is disposed on a surface of the dielectric layer opposite to the semiconductor substrate. A plurality of intended die areas are defined on the first main surface of the device layer. The plurality of intended die areas are separated from one another. A plurality of die access trenches are formed in the semiconductor substrate from the second main surface. Each of the plurality of die access trenches are disposed generally beneath at least a respective one of the plurality of intended die areas.

Technique for stable processing of thin/fragile substrates

A photodetector includes a semiconductor substrate having first and second main surfaces opposite to each other. The photodetector includes at least one trench formed in the first main surface and a first anode/cathode region having a first conductivity formed proximate the first main surface and sidewalls of the at least one trench. The photodetector includes a second anode/cathode region proximate the second main surface. The second anode/cathode region has a second conductivity opposite the first conductivity. The at least one trench extends to the second main surface of the semiconductor substrate.

Front lit PIN/NIP diode having a continuous anode/cathode

A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Photodetector array using isolation diffusions as crosstalk inhibitors between adjacent photodiodes

A method for manufacturing a photodiode array includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has a first layer of a first conductivity proximate the first main surface and a second layer of a second conductivity proximate the second main surface. A via is formed in the substrate which extends to a first depth position relative to the first main surface. The via has a first aspect ratio. Generally simultaneously with forming the via, an isolation trench is formed in the substrate spaced apart from the via which extends to a second depth position relative to the first main surface. The isolation trench has a second aspect ratio different from the first aspect ratio.

Method of manufacturing a photodiode array with through-wafer vias

A photodiode having an increased proportion of light-sensitive area to light-insensitive area includes a semiconductor having a backside surface and a light-sensitive frontside surface. The semiconductor includes a first active layer having a first conductivity, a second active layer having a second conductivity opposite the first conductivity, and an intrinsic layer separating the first and second active layers. A plurality of isolation trenches are arranged to divide the photodiode into a plurality of cells. Each cell has a total frontside area including a cell active frontside area sensitive to light and a cell inactive frontside area not sensitive to light. The cell active frontside area forms at least 95 percent of the cell total frontside area. A method of forming the photodiode is also disclosed.

Photodiode having increased proportion of light-sensitive area to light-insensitive area

A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. A trench is formed in the semiconductor substrate at the first main surface. The trench extends to a first depth position in the semiconductor substrate. The trench is lined with the dielectric material. The trench is filled with a conductive material. An electrical component is electrically connected to the conductive material exposed at the first main surface. A cap is mounted to the first main surface. The cap encloses the electrical component and the electrical connection.

Silicon wafer having through-wafer vias

A photodiode includes a semiconductor having front and backside surfaces and first and second active layers of opposite conductivity, separated by an intrinsic layer. A plurality of isolation trenches filled with conductive material extend into the first active layer, dividing the photodiode into a plurality of cells and forming a central trench region in electrical communication with the first active layer beneath each of the cells. Sidewall active diffusion regions extend the trench depth along each sidewall and are formed by doping at least a portion of the sidewalls with a dopant of first conductivity. A first contact electrically communicates with the first active layer beneath each of the cells via the central trench region. A plurality of second contacts each electrically communicate with the second active layer of one of the plurality of cells. The first and second contacts are formed on the front surface of the photodiode.

Front side electrical contact for photodetector array and method of making same

A bonded-wafer semiconductor device includes a semiconductor substrate, a buried oxide layer disposed on a first main surface of the semiconductor substrate and a multi-layer device stack. The multi-layer device stack includes a first device layer of a first conductivity disposed on the buried oxide layer, a second device layer of a second conductivity disposed on the first device layer, a third device layer of the first conductivity disposed on the second device layer and a fourth device layer of the second conductivity disposed on the third device layer. A trench is formed in the multi-layer device stack. A mesa is defined by the trench. The mesa has first and second sidewalls. A first anode/cathode layer is disposed on a first sidewall of the multi-layer device stack, and a second anode/cathode layer is disposed on the second sidewall of the multi-layer device stack.

Bonded-wafer superjunction semiconductor device

A backlit photodiode array includes a semiconductor substrate having first and second main surfaces opposite to each other. A first dielectric layer is formed on the first main surface. First and second conductive vias are formed extending from the second main surface through the semiconductor substrate and the first dielectric layer. The first and second conductive vias are isolated from the semiconductor substrate by a second dielectric material. A first anode/cathode layer of a first conductivity is formed on the first dielectric layer and is electrically coupled to the first conductive via. An intrinsic semiconductor layer is formed on the first anode/cathode layer. A second anode/cathode layer of a second conductivity opposite to the first conductivity is formed on the intrinsic semiconductor layer and is electrically coupled to the second conductive via.

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Belfast, United Kingdom

Cormac MacNamara