Motorola Corporation

Freescale Semiconductor,inc.

Corey D Overgaard

Jonathan K Abrokwah

Ravindranath Droopad

Jerald A Hallmark

Zhiyi Jimmy Yu

Matthias Passlack

Jamal Ramdani

William J Ooms

Jun J Wang

Jay A Curless

Brian Bowers

Bruce A Bernhardt

Hao Li

Yong Liang

Jeffrey M Finder

Michael P LaMacchia

Zhiyi (Jimmy) Yu

Zhiyi Yi

An exemplary system and method for providing a microwave regime, frequency-agile device is disclosed as comprising inter alia: a low-loss, insulating substrate ( ); a layer of SiO ( ) over the surface of said substrate; and a layer of BST ( ) deposited over the SiO layer ( ). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize frequency response or other material characteristics. Exemplary embodiments of the present invention representatively provide for integrated high-efficiency, low-loss microwave components that may be readily incorporated with existing technologies for the improvement of frequency response, device package form factors, weights and/or other manufacturing, device or material performance metrics.

BST on low-loss substrates for frequency agile applications

High quality epitaxial layers of monocrystalline oxide materials ( ) are grown overlying monocrystalline substrates such as large silicon wafers ( ) using RHEED information to monitor the growth rate of the growing film. The monocrystalline oxide layer ( ) may be used to form a compliant substrate for monocrystalline growth of additional layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer ( ) on a silicon wafer ( ) spaced apart from the silicon wafer ( ) by an amorphous interface layer of silicon oxide ( ). The amorphous interface layer ( ) dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer ( ).

Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method

A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (,) having a surface (,); forming on the surface of the silicon substrate an interface (,) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (,) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO,, where X is a metal.

Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon

A gate quality oxide-compound semiconductor structure (10) is formed by the steps of providing a III-V compound semiconductor wafer structure (13) with an atomically ordered and chemically clean semiconductor surface in an ultra high vacuum (UHV) system (20), directing a molecular beam (26) of gallium oxide onto the surface of the wafer structure to initiate the oxide deposition, and providing a second beam (28) of atomic oxygen to form a Ga.sub.2 O.sub.3 layer (14) with low defect density on the surface of the wafer structure. The second beam of atomic oxygen is supplied upon completion of the first 1-2 monolayers of Ga.sub.2 O.sub.3. The molecular beam of gallium oxide is provided by thermal evaporation from a crystalline Ga.sub.2 O.sub.3 or gallate source, and the atomic beam of oxygen is provided by either RF or microwave plasma discharge, thermal dissociation, or a neutral electron stimulated desorption atom source.

Method of forming a gate quality oxide-compound semiconductor structure

A method of preparing crystalline alkaline earth metal oxides on a Si substrate wherein a Si substrate with amorphous silicon dioxide on a surface is provided. The substrate is heated to a temperature in a range of 700.degree. C. to 800.degree. C. and exposed to a beam of alkaline earth metal(s) in a molecular beam epitaxy chamber at a pressure within approximately a 10.sup.-9 -10.sup.-10 Torr range. During the molecular beam epitaxy the surface is monitored by RHEED technique to determine a conversion of the amorphous silicon dioxide to a crystalline alkaline earth metal oxide. Once the alkaline earth metal oxide is formed, additional layers of material, e.g. additional thickness of an alkaline earth metal oxide, single crystal ferroelectrics or high dielectric constant oxides on silicon for non-volatile and high density memory device applications.

Method of preparing crystalline alkaline earth metal oxides on a Si

A method of passivating the surface of a Si wafer is disclosed including the steps of cleaning the surface of the Si wafer and depositing an alkaline earth metal on the clean surface at a wafer temperature in a range of approximately 400.degree. C. to 750.degree. C. The surface is monitored during deposition to detect a (4.times.2) surface reconstruction pattern indicating approximately a one-quarter monolayer of alkaline earth metal is formed. The wafer is annealed at a temperature in a range of 800.degree. C. to 900.degree. C. until the alkaline earth metal forms an alkaline earth metal silicide with a (2.times.1) surface pattern on the surface.

Method of passivating the surface of a Si substrate

A production process for protecting the surface of compound semiconductor wafers includes providing a multi-wafer epitaxial production system with a transfer and load module, a III-V growth chamber and an insulator chamber. The wafer is placed in the transfer and load module and the pressure is reduced to .ltoreq.10.sup.-10 Torr, after which the wafer is moved to the III-V growth chamber and layers of compound semiconductor material are epitaxially grown on the surface of the wafer. The wafer is then moved through the transfer and load module to the insulator chamber and an insulating cap layer is formed by thermally evaporating gallium oxide molecules from an effusion cell using an evaporation source in an oxide crucible, which oxide crucible does not form an eutectic alloy with the evaporation source

III-V epitaxial wafer production

A method of fabricating submicron HFETs includes forming a buffered substrate structure with a supporting substrate of GaAs, a portion of low temperature AlGaAs grown on the supporting substrate at a temperature of approximately 300.degree. C., a layer of low temperature GaAs grown on the portion AlGaAs layer at a temperature of 200.degree. C., a layer of low temperature AlGaAs grown on the GaAs layer at a temperature of 400.degree. C., and a buffer layer of undoped GaAs grown on the second AlGaAs layer. Complementary pairs of HFETs can be formed on the buffered substrate structure, since the structure supports the operation of p and n type transistors equally well.

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Phoenix, AZ, United States of America

Corey D Overgaard