Intersil Americas Inc.

Texas Instruments Corporation

Congzhong Huang

Xuelin Wu

Sicheng Chen

Bryan E Bloodworth

Sisan Shen

Shea Lynn Petricek

Fredrick W Trafton

Xiping Yang

Mike Sheperek

Michael Sheperek

Michael M Walters

Jeremy Robert Kuehlwein

Kirk D Peterson

Marcus Marchesi Martins

Haito Hu

A DC to DC converter circuit includes circuitry for generating a PWM waveform signal at a phase node of a DC to DC converter responsive to an input voltage and amonitormonitoredoutput voltage. The circuitry further includes a high side switching transistor connected between the input voltage and a phase node and a low side switching transistor connected between the phase node and ground. An output filter is connected to the circuitry for generating the PWM waveform signal. The output filter includes an inductor having a first side connected to the phase node and a second side connected to an output voltage node. Detection circuitry detects zero current crossings in the inductor responsive to a voltage across the high side switching transistor and a voltage across the low side switching transistor.

High-side sensing of zero inductor current for step-down DC-DC converter

A method of regulating voltage with a switching regulator is disclosed. The method includes sensing an output voltage provided by the regulator. If the output voltage drops below a low voltage threshold, a burst of one or more current pulses is provided. If the output voltage raises above a high voltage threshold during the burst, discontinuing the burst of current pulses. The method includes counting a number of the one or more current pulses in the burst, and comparing the number of the one or more current pulses with at least one pulse threshold. The upper current threshold is adjusted based on the number of the one or more current pulses.

Current pulse count control in a voltage regulator

A multi-channel LED driver includes a plurality of linear current regulators, each connected to a bottom of a string of series connected LEDs of a multi-channel LED that controls a bias current and the string of series connected LEDs responsive to an LED bias reference voltage. A dynamic headroom regulation voltage control circuit monitors the headroom regulation voltage at the bottom of each string of the series connected LEDs in the multi-channel LED and generates a reference voltage controlling each of the headroom regulation voltages responsive to the LED bias reference voltage.

LED driver with adaptive dynamic headroom voltage control

A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging phase in a first mode of operation, a pass through phase in a second mode of operation and a discharge phase in a third mode of operation within the buck/boost voltage regulator to eliminate occurrence of a four switch switching condition.

High efficiency PFM control for buck-boost converter

A multi-phase non-inverting buck boost voltage converter has a plurality of buck boost voltage regulators. Each regulator is associated with a separate phase for generating a regulated output voltage responsive to an input voltage. A plurality of current sensors are each associated with one of the plurality of buck boost voltage regulators for monitoring an input current to the associated buck boost voltage regulator and generating a current sense signal for the associated phase. A plurality of buck boost mode control circuitries are each associated with one of the buck boost regulator for controlling an associated buck boost voltage regulator using peak current mode control in a buck mode of operation and valley current mode control in boost mode of operation responsive to a common error voltage and the associated current sense signal. The plurality of buck boost mode control circuitries provides current balancing between the phases. A voltage error circuit generates the error voltage responsive to the regulated output voltage.

Multi-phase non-inverting buck boost voltage converter

A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors responsive to the current sense signal, the output voltage and a current limit signal, wherein when the current limit signal indicates the inductor current exceeds a current limit the control signals configure the pair of switching transistors to decrease the inductor current.

System and method for current limiting a DC-DC converter

A buck boost converter generates a regulated output voltage responsive to an input voltage and switching control signals. Switching control circuitry generates the switching control signals responsive to the regulated output voltage, a maximum duty cycle signal and a mode signal. Mode control circuitry generates the maximum duty cycle signal and the mode signal responsive to a buck PWM signal and a boost PWM signal, a first clock signal and a second clock signal phase shifted from the first clock signal by a fixed, programmable amount. A phase shifter generates the first clock signal and the second clock signal responsive to a reference voltage and a synchronization signal.

Clock phase shifter for use with buck-boost converter

A buck voltage converter comprises an upper switching transistor connected between an input voltage node and a phase node. The upper switching transistor turns on and off responsive to a first drive signal. A lower switching transistor is connected between the phase node and ground. The lower switching transistor turns on and off responsive to a second drive signal. An inductor is connected the phase node and an output voltage node. Control circuitry generates the first drive signal and the second drive signal responsive to a feedback voltage monitored at the output voltage node and a phase at the phase node. In a pulse frequency mode voltage of operation the control circuitry turns off the upper switching transistor and turns on the lower switching transistor responsive to a determination that a predetermined period of time has occurred since a detection of a phase switch at the phase node and turns off both the upper switching transistors and the lower switching after the lower switching transistor has been turned on for a second predetermined period of time.

DC/DC converter including ultrasonic feature for use with low quiescent currents

A non-inverting buck boost voltage converter includes a buck boost voltage regulation circuitry for generating a regulated output voltage responsive to an input voltage. A current sensor monitors an input current to the buck boost voltage regulation circuitry. Buck boost mode control circuitry controls the buck boost voltage regulation circuitry using peak current mode control in a buck mode of operation and valley current mode control in boost mode of operation responsive to the monitored input current.

Non-inverting buck boost voltage converter

A DC to DC converter circuit includes circuitry for generating a PWM waveform signal at a phase node of a DC to DC converter responsive to an input voltage and a monitor output voltage. The circuitry further includes a high side switching transistor connected between the input voltage and a phase node and a low side switching transistor connected between the phase node and ground. An output filter is connected to the circuitry for generating the PWM waveform signal. The output filter includes an inductor having a first side connected to the phase node and a second side connected to an output voltage node. Detection circuitry detects zero current crossings in the inductor responsive to a voltage across the high side switching transistor and a voltage across the low side switching transistor.

High-side sensing of zero inductor current for step down DC-DC converter

Managing temperature of a read/write head () in a disk drive system in which there is a power variance due to different operation modes. A circuit device () determines and delivers additional power needed for compensating for the temperature variance due to different operational power requirements. The power is delivered to a resistive heater (Rheat) associated with the head (). The compensating power is based on the delivery voltage, delivery current, and resistance of the resistive heater (Rheat). The delivery current is varied to account for changes in the resistance of the resistive heater (Rheat) since it can vary with temperature. By sensing the current with a sensor (), the resistance is determined via the sensed current and the delivery voltage. The current is adjusted for maintaining the compensating power.

Preamplifier fly height control (FHC) driver and sensing circuit

A fly height controller (FHC;FHC') for controlling the fly height of a read/write head assembly () in a disk drive () is disclosed. A heat element resistor () is disposed within the read/write head assembly (). The fly height controller (FHC;FHC&#x2032;) includes registers (R,W) for storing digital data words corresponding to the desired drive levels to be applied to the heat element resistor () during read and write operations. The registers (R,W) are selectively coupled to a steady-state digital-to-analog converter (DAC) (), depending upon whether a read or write operation is occurring; the output of the steady-state DAC () is applied to a voltage driver (), which in turn drives current into the heat element resistor (). Overdrive and underdrive transistors (P,N) are provided to overdrive and underdrive the input to the voltage driver () in transitions between read and write operations. An initial state register () receives a digital word indicating the desired current for the heat element resistor () when unselected; the output of the initial state register () is applied to an initial state DAC (), which drives an initial state voltage driver (). Control logic (&#x2032;) controls whether the steady-state voltage driver () or initial state voltage driver () drives the heat element resistor (). The fly height controller (FHC&#x2032;) may also be adapted to control the fly height of multiple read/write head assemblies () in a disk drive.

Fly height control for a read/write head in a hard disk drive

The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.

Growing community of inventors

Plano, TX, United States of America

Congzhong Huang