Nxp Usa, Inc.

Nxp B.v.

Congyong Zhu

Bernhard Grote

Bruce McRae Green

Darrell Glenn Hill

Philippe Renaud

Lawrence Scott Klingbeil

Anthony Ciancio

Fred Reece Clayton

David Robert Currier

Jie Hu

A transistor device includes a semiconductor substrate and a gate structure formed over the substrate. When fabricating the transistor device, at least one dielectric layer may be formed over ohmic contact structures of the transistor device, which may mitigate migration of material, such as metal, from the ohmic contact structures onto sensitive surfaces of the transistor device during subsequent fabrication processes. The transistor device may include one or more dielectric spacers, including at least one dielectric spacer disposed at a side wall of a gate channel through which gate structure contacts the substrate. The transistor device may include a field plate formed at least partially over the gate structure, the field plate having one or more stepped portions, which may improve linearity performance of the transistor device.

Transistor with defect mitigation structures

A semiconductor device includes a semiconductor substrate with an upper surface and a channel, source and drain electrodes over the upper surface of the semiconductor substrate, a passivation layer between the source and drain electrodes, a first dielectric layer over the passivation layer, a gate electrode between the source and drain electrodes, and a conductive field plate adjacent to the gate electrode. The passivation layer includes a lower passivation sub-layer and an upper passivation sub-layer over the lower passivation sub-layer. The gate electrode includes a lower portion that extends through the passivation layer. The conductive field plate includes a first portion with a recessed region that extends through the upper passivation sub-layer but does not extend through the lower passivation sub-layer, and an overhanging portion that extends over an upper surface of the first dielectric layer.

Semiconductor device with a field plate having a recessed region and an overhanging portion and method of fabrication therefor

Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a gate electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.

Transistors with source-connected field plates

Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.

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Gilbert, AZ, United States of America

Congyong Zhu