Analog Devices,inc.

Colin Stephen Gormley

Stephen Alan Brown

Scott Carlton Blackstone

Michael W Judy

Maurice S Karpman

Lawrence E Felton

John A Yasaitis

Chang-Han Yun

William Andrew Nevin

Scott Jong Ho Limb

A semiconductor wafer comprises an SOI comprising a device layer on an oxide layer supported on a handle layer. Micro-mirrors are formed in the device layer, and access bores extend through the handle layer and the oxide layer to the micro-mirrors for accommodating optical fibers to the micro-mirrors. The access bores are accurately aligned with the micro-mirrors, and the access bores are accurately formed of circular cross-section. Each access bore comprises a tapered lead-in portion extending to a parallel portion. The diameter of the parallel portion is selected so that the optical fibers are a tight fit therein for securing the optical fibers in alignment with the micro-mirrors. The tapered lead-in portions of the access bores are formed to a first depth by a first dry isotropic etch for accurately forming the taper and the circular cross-section of the tapered lead-in portions. The parallel portions are formed from the first depth to a second face of the handle layer by a second dry etch, namely, an anisotropic etch carried out using the Bosch process. By so etching the access bores the access bores are accurately formed of circular transverse cross-section and of accurate dimensions.

Method for etching a tapered bore in a silicon substrate, and a semiconductor wafer comprising the substrate

A method for forming an isolation filled trench () in a silicon layer () of an SOI structure (). The trench () is relieved adjacent its open mouth () in order to displace the commencement of bridging of the trench () with the filling material, to a level () well below a first surface () of the silicon layer () for in turn displacing voids () from the open mouth () into the trench () below the level (). The trench may be relieved by forming tapered portions () in the side wells () adjacent the open mouth (), and/or by relieving one or more lining layers () in the trench () adjacent the open mouth () to form tapered portion () and (). Instead of relieving the trench () by tapering the side walls () relieving recesses may be formed into the first surface () of the silicon layer () adjacent the open mouth (). By relieving the trench () or one or more of the lining layers () adjacent the open mouth () the commencement of bridging of the trench with the filling material is displaced downwardly to a level (), which displaces voids formed in the trench below the level (). By sufficiently relieving the trench () and/or lining layers () adjacent the open mouth to a sufficient depth the formation of voids in the trench may be completely avoided.

Method for forming a filled trench in a semiconductor layer of a semiconductor substrate, and a semiconductor substrate with a semiconductor layer having a filled trench therein

A semiconductor wafer having a matrix array of micro-mirrors comprises a component substrate carried on a base substrate. The component substrate comprises a membrane layer in which the micro-mirrors are formed and a supporting handle layer. The base substrate comprises a base layer from which a plurality of pedestals extend upwardly therefrom into cavities in the handle layer corresponding to the micro-mirrors. Each pedestal carries electrodes for co-operating with the micro-mirrors for tilting thereof. Conductors through vias in the pedestals connect the electrodes to electrically conductive tracks on a bottom surface, and in turn through conductors through vias to addressing terminals for addressing the electrodes. By forming the pedestals in the base substrate and projecting the pedestals into the cavities in the handle layer the handle layer is recessed into the base substrate thereby facilitating the provision of a handle layer of depth sufficient for adequately supporting the membrane layer during fabrication of the wafer.

Semiconductor wafer comprising micro-machined components

A method for producing a semiconductor wafer () with one or more micro-mirrors () formed in a membrane layer () which is supported on a handle layer () with a buried oxide layer () between the membrane and handle layers () which avoids rupturing of tethers () which support the micro-mirrors () in the membrane layer () and also avoids bowing of the micro-mirrors (). After trenches () are formed in the membrane layer () for defining the micro-mirrors () and the tethers (), and prior to forming of through bores () through the handle layer () to the micro-mirrors (), a support layer () of oxide is deposited on the exposed surface () of the membrane layer () over the micro-mirrors () and the tethers () and is back filled into the trenches () for supporting bridging portions () of the buried oxide layer (). The buried oxide layer () acts as an etch stop layer for the through bores (), and stresses which are induced in exposed portions () of the buried oxide layer () exposed by the through bores () during etching of the through bores () are counteracted by the support layer () which prevents rupturing of the bridging portions (), thereby preventing rupturing of the tethers (). By counteracting the stresses induced in the exposed portions () of the buried oxide layer () bowing of the exposed portions () is avoided and thus bowing of the micro-mirrors () is also avoided.

Method for forming a micro-mechanical component in a semiconductor wafer, and a semiconductor wafer comprising a micro-mechanical component formed therein

A flip-bonding technique is used to fabricate complex micro-electromechanical systems. Various micromachined structures are fabricated on the front side of each of two wafers. One of the wafers is flipped over and bonded to the other wafer so that the front sides of the two wafers are bonded together in a flip-stacked configuration.

Fabricating complex micro-electromechanical systems using a flip bonding technique

An intermediate electrode layer is used to fabricate an integrated micro-electromechanical system. An intermediate electrode layer is formed on an integrated circuit wafer. The intermediate electrode layer places drive electrodes a predetermined height above the surface of the integrated circuit wafer. A micro-electromechanical system wafer having micromachined optical mirrors is bonded to the integrated circuit wafer such that the drive electrodes are positioned a predetermined distance from the optical mirrors.

Fabricating integrated micro-electromechanical systems using an intermediate electrode layer

A method for forming a multi-layer semiconductor device ( ) having a lower silicon layer ( ), an intermediate silicon layer ( ) within which micro-mirrors ( ) are formed and an upper spacer layer ( ) of silicon for spacing another component from the micro-mirrors ( ). First and second etch stop layers ( ) of oxide act as insulation between the respective layers ( ). In order to minimize damage to the micro-mirrors ( ), the formation of the micro-mirrors ( ) is left to the end of the forming process. An assembly of the lower layer ( ) and the intermediate layer ( ) with the first etch stop layer ( ) is formed, and the second etch stop layer ( ) is then grown and patterned on the intermediate layer ( ) for subsequent formation of the micro-mirrors ( ). The upper layer ( ) is then bonded by an annealing process to the patterned second etch stop layer ( ). After the formation of communicating bores ( ) in the lower layer ( ) and thinning of the first etch stop layer ( ) adjacent the micro-mirrors ( ) through the communicating bores ( ), openings ( ) in the upper layer ( ) and the micro-mirrors ( ) are sequentially formed by reactive ion etching through the upper layer ( ). Portions of the first and second etch stop layers ( ) adjacent the micro-mirrors ( ) are then etched away.

Growing community of inventors

Belfast, Ireland

Colin Stephen Gormley