Newae Technology Inc.

Other

Colin Patrick O'Flynn

Jean-Pierre Thibault

A method and apparatus for analyzing side-channel security vulnerabilities in a digital device. A first time sequence of measurements of side-channel related phenomena of the digital device, such as power draw or electromagnetic emissions is obtained. A second time sequence of debug outputs of the digital device, such as program counter contents or other device processor or register states, is obtained. The first time sequence and the second time sequence are obtained based on a common time reference, and thus correlated in time. A controller can provide a common timing signal to measurement equipment obtaining the first time sequence and to a debug tool obtaining the second time sequence, and the common time reference can be correspond to the common timing signal.

Method and apparatus for analyzing side channel-related security vulnerabilities in digital devices

Methods and apparatus are provided for causing the incorrect operation ('faults') of digital devices such as embedded computer systems or integrated circuits. The apparatus uses a switching element to cause perturbations on the power supplies of the digital device. This apparatus can be connected to existing embedded systems with a minimal of modifications, and can insert a variety of faults into those embedded systems. Such faults can be used for verification of fault-tolerant systems or algorithms, including both safety-critical designs and cryptographic designs.

Insertion of faults into computer systems

Methods and apparatus are provided for sampling an indicator of the internal state of an embedded system or integrated circuit, where the indicator is sampled in a manner synchronous to the internal clock of the embedded system or integrated circuit. The resulting samples can be used for determining secret data within the embedded system or integrated circuit, detecting failures, or detecting counterfeit devices.

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Halifax, Canada

Colin Patrick O'Flynn