Intel Corporation

Plessey Semiconductors Limited

Zarlink Semiconductor Limited

Mitel Semiconductor Limited

Colin Leslie Perry

Isaac Ali

William L Barber

Keith Pinson

Christopher Robert Shepherd

Stephen John Parry

Alessandro F Deidda

Mark S Mudd

Nicholas Paul Cowley

Andrew Paul Collins

Richard J Goldman

Boping Wu

Chi Man Kan

Alan J Martin

Matthew T Aitken

Andrew David Talbot

Nick Cowley

Ruiyan Zhao

Stephen J Spinks

Ruchir Saraswat

Marcus Richard Granger-Jones

Sawyer Albert David

Jeffrey Mh Smith

Richard Jeremy Salt

In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.

Decoupling arrangement

A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.

Systems and methods for monitoring consumption

A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.

Dual mode voltage regulator with reconfiguration capability

A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.

Dual mode voltage regulator with dynamic reconfiguration capability

Techniques involving the generation of signals at particular frequencies are disclosed. For instance, an apparatus may include an oscillator module, a synthesizer module, and a control module. The oscillator module produces an oscillator signal having a first frequency. From the oscillator signal, the synthesizer module produces an output signal having a second frequency. A frequency multiplier corresponds to the first and second frequencies. The control module selects the first frequency and the frequency multiplier such that a difference between the second frequency and a nearest integer multiple of the first frequency is greater than a predetermined threshold. As a result, reductions in spurious outputs may be achieved.

Frequency generation techniques

Methods and apparatus to fine gain and/or phase adjustment of analog quadrature filters are described. In one embodiment, gain and/or phase of an analog quadrature filter may be digitally controlled by switching one or more resistors coupled to the quadrature filter. Other embodiments are also described.

Fine gain and phase adjustment of analog quadrature filters

Various embodiments are directed to removing interfering signals in a broadband radio frequency (RF) receiver by implementing a silicon tuner arranged to replicate high quality factor (Q) performance without the advantages of using high Q components available for module tuners. In one or more embodiments, tuned filter elements within a broadband silicon tuner are reused to maximize the attenuation of unwanted signals while minimizing induced undesirable channel ripple. In various implementations, a number of tuned passive inductor/capacitor filter elements are combined as required such that filter elements for an unused frequency band are reconfigured to provide attenuation of and enhanced immunity to unwanted signals. Other embodiments are described and claimed.

Removing interfering signals in a broadband radio frequency receiver

An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.

AGC module and method for controlling noise figure and intermodulation characteristics therein

A circuit arrangement having a plurality of variable capacitance elements such as varactors is described, the varactors having associated electronic control means which controls the capacitance of the variable capacitance elements over a control range. The control range is such that for any particular variable capacitance element a complete variation from a lowest to a highest capacitance is obtained from only a portion of the control range.

Circuit arrangement

A variable capacitance network is disclosed, comprising a plurality of capacitance arms connected in parallel with each other between first and second terminals of the network. Each capacitance arm has a varactor and a series capacitor in series with the varactor A control input applies a common control signal to the junctions between the varactors and their associated series capacitors, to allow for simultaneous control of each varactor.

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Swindon, United Kingdom

Colin Leslie Perry