Agilent Technologies, Inc.

Keysight Technologies, Inc.

Colin Johnstone

Eric Breakenridge

Alexander Stephen

William Ross MacIsaac

Daya Rasaratnam

Norman Carder

A method for generating M parallel pseudorandom binary sequences (PRBSs), each comprising a 2&#x2212;1 sequence of pseudorandom bits, includes loading into the circuit an initial M-bit word, the initial M-bit word comprising M sequential bits selected from a pre-determined PRBS-n sequence, wherein n&#x3e;1 and M&#x3e;n. The method includes generating, using a plurality of logic gates of the circuit, a next M-bit word using at least n+1 of the M sequential bits of the initial M-bit word. The method includes repeatedly generating, using the logic gates of the circuit, the next M-bit word from a previous M-bit word using the at least n+1 of M sequential bits of the previous M-bit word, resulting in M parallel sequences of the PRBS-n sequence. The method includes transmitting the generated next M-bit words on an M-bit wide parallel bus.

Methods and circuits for generating parallel pseudorandom binary sequences

An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.

Method and apparatus for detecting leading pulse edges

A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value in a stream of data samples, and provides the stored data from an address in the memory corresponding to the received parameter value. An updating element updates stored data and provides the updated data to an input of the dual port memory for writing back into the address corresponding to the received parameter value. A first port of the dual port memory is utilised as the output of the dual port memory coupled to the input of the updating element on a first clock cycle of the dual port memory, and a second port of the dual port memory is normally utilised as the input of the dual port memory coupled to the output of the updating element on a second clock cycle, the next address being accessed via the first port on the second clock cycle. A comparator receives the parameter value on the first clock cycle of the dual port memory and a next received parameter value on a second clock cycle, and provides a match signal if the received parameter value and the next received parameter value are the same. The match signal is utilised to enable the first port of the dual port memory to be used as the input for the second clock cycle so that the data updated by the updating element on the first clock cycle is provided at the first port rather than the second port and is therefore correctly provided to the input of the updating element on the second clock cycle.

Apparatus and method for updating data in a dual port memory

In apparatus for generating a Complementary Cumulative Distribution Function (CCDF) curve for an input signal, an analog to digital converter (ADC) samples the input signal at sampling points to provide a parameter value corresponding to a desired parameter of the input signal at each sampled point. A memory element provides a frequency count of occurrence of each received parameter value from an address in the memory corresponding to the received parameter value. An adder receives the frequency count, increments the count and provides the incremented count to an input of the memory element for writing back into the address corresponding to the received parameter value. A CCDF curve generating module reads the frequency count stored in the memory element corresponding to each parameter value and generates a CCDF curve therefrom.

Apparatus and method for generating a complementary cumulative distribution function (CCDF) curve

Digital samples corresponding to a pulsed input signal are provided from an ADC to a memory for storage and to a pulse extraction circuit. The pulse extraction circuit detects the leading and trailing edges of pulses in the input signal. The digital samples are stored in both a Current memory buffer and a Next memory buffer. When a pulse trailing edge is detected, the Current buffer is stopped from storing further samples, the Next buffer becomes the Current buffer and a new buffer becomes the Next buffer. Digital data samples are then provided from the (previous) Current buffer after it has stopped storing samples.

Method and apparatus for extracting individual pulses from an input signal

Attenuation of a pulsed signal traversing a cable is assessed by identifying a pulse in a signal received after traversing the cable and determining first and second reference signal levels in dependence upon characteristics of the pulse. A measurement is made of the slope of the pulse between the first and second reference signal levels (such as 25% and 75% of the peak pulse magnitude), and this measurement is used to determine an indication of the cable attenuation. The cable attenuation may in turn be used to determine a threshold for indicating loss of signal during a measurement operation.

Determining cable attenuation and loss of signal threshold

The magnitude of a pulse in a signal having both positive and negative polarity pulses (for example, a ternary PDH signal) is determined by measuring the magnitude of multiple samples of the signal. A reference level for the signal is determined from a plurality of these sample magnitudes, and the magnitude of a pulse in the signal is determined from the sample magnitudes and the reference level.

Determining the magnitude of pulses

A data analyzer system measures the duration of a service disruption event in an asynchronous transfer mode (ATM) data transmission channel carrying an ATM stream of identifiable data cells in a defined order. The data analyzer system determines whether or not any of the data cells have been corrupted in transmission through the data transmission channel during transmission disruption. A timer determines a service disruption event duration upon elapse of a predetermined guard time.

ATM service disruption measurement

The invention provides a method of identifying framing bits in order to correctly frame a test signal comprising a data payload in the form of a pseudo random binary sequence (PRBS), split into frames by a number of framing bits, after disruption and re-establishment of transmission of the test signal. The method comprises comparing the test signal to a comparison PRBS, and determining the position of the framing bits, or other non-payload data, based on the position of mismatches between the incoming test signal and the comparison PRBS. Errors may be deliberately introduced before transmission of the test signal, in a predetermined position relative to the non-payload data bits, so that analysis of the payload data is used to identify the framing elements.

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Fife, United Kingdom

Colin Johnstone