Pmc-sierra, Inc.

Mitel Corporation

Colin Harris

Brian D Gerson

Kris Iniewski

David LeBlanc

Curtis Brian Lapadat

Curtis B Lapadat

David Leblanc

A resistor having a diffused impurity region in a semiconductor substrate, an insulated gate surrounding and defining the resistor, and a pair of separated conductive contacts to the diffused region within the boundary of the insulated gate for applying and receiving current passing through the resistor.

Polysilicon defined diffused resistor

A tri-state output driver comprised of a pair of complementary field effect transistors (CMOS FETs) having sources and drains connected in a series circuit between a voltage rail and ground, apparatus for applying similar logic high and low input signals to respective gates of the FETs whereby an output terminal connected in a circuit between the sources and drains of the FETs is driven toward ground or the voltage rail respectively, or opposite polarity input signals to the gates for causing the FETs to assume a high impedance, and apparatus for maintaining a voltage across the source and drain of the FET which is connected in a circuit between the voltage rail and the output terminal, at less than a lower of an FET threshold of conduction voltage or diode turn-on voltage greater than the voltage of the voltage rail, during the high impedance state, so as to maintain the latter FET in a high impedance state even when a voltage at the output terminal is equal to a voltage which is higher than an FET threshold of conduction or diode turn-on voltage greater than the voltage of the voltage rail.

Tristatable output driver for use with 3.3 or 5 volt CMOS logic

An electrostatic discharge (ESD) protection structure for protection of a circuit to which an operation voltage is to be applied, comprising a silicon controlled rectifier (SCR) connected between ground and a pad of the circuit to be protected, the SCR including a resistor apparatus connected to the pad for controlling the breakdown voltage of the SCR, and apparatus for controlling the resistor apparatus to a high resistance value in the absence of the application of the operation voltage whereby the SCR is controlled to break down at a low ESD voltage which is lower than a circuit damaging voltage, and to be of low resistance value upon the application of the operation voltage whereby the SCR is controlled to break down at an ESD voltage which is higher than the low ESD voltage.

Low voltage silicon controlled rectifier structure for ESD input pad

An integrated circuit analog crosspoint switch FET array which utlilizes considerably reduced silicon substrate area than previously. In a preferred embodiment, pairs of the separate diffused regions of different FETs which are connected to the same input are common, forming separate single diffused regions. The separate single diffused regions and the central single diffused regions alternate continuously in a row, separated by the channel regions forming the various transistors. The result is a continuous row of transistors having common diffused regions, except for the transistors at the end of the row, which have their outer diffused regions not in common with any other.

Compact CMOS analog crosspoint switch matrix

A latchup and electrostatic discharge protection circuit for an analog reference or bias voltage power supply input connected between an input power providing terminal of the power supply and a power rail of a CMOS integrated circuit having a parasitic latch device. The protection circuit comprised of three field effect transistors close-circuits a path from the power supply input to the power rail for normal power supply conditions and open-circuits the path for excessively positive and negative voltages at the power supply input, thereby safeguarding the CMOS integrated circuit from currents resulting from the excessive positive and negative voltages.

Growing community of inventors

New Westminster, Canada

Colin Harris