Allegro Microsystems, LLC

Colin Hall

James McIntosh

Robert Douglas Christie

Christy Looby

Alistair Wood

An interface circuit, comprising: I/O circuitry configured to couple one or more first terminals with one or more second terminals; a voltage regulator configured to power the I/O circuitry; a restrictor element that is disposed between the voltage regulator and the I/O circuitry, the restrictor element being disposed on a circuit path that connects the voltage regulator to the I/O circuitry, the restrictor element being configured to open the circuit path and disconnect the voltage regulator from the I/O circuitry when an electrical current that is being supplied to the I/O circuitry exceeds a threshold; and a voltage suppressor that is disposed on the circuit path that connects the voltage regulator to the I/O circuitry, the voltage suppressor being disposed between the restrictor element and the I/O circuitry, the voltage suppressor being configured to limit, to a first voltage value, a voltage that is input into the I/O circuitry.

Interface for high-voltage applications

A transistor drive circuit uses multi-stage slew rate control to drive one or more switching transistors. After a decision is made to change transistor state, a first drive current may be applied to an input terminal of the transistor for a predetermined time duration. After the predetermined time duration, a second drive current may be applied to the input terminal. When the transition between states is substantially complete, the current drive to the input terminal may be changed to a voltage drive. In some embodiments, the predetermined time duration may be based on the start time of a Miller plateau during the transition period.

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West Linton, United Kingdom

Colin Hall