Arm Limited

Clément Marc Demongeot

Michael John Williams

Jocelyn Francois Orion Jaubert

Louis-Marie Vincent Mouton

Damien Robin Martin

Albin Pierick Tonnerre

Frédéric Claude Marie Piry

A method, apparatus and system are provided for diagnosing a processor executing a stream of instructions by causing the processor to execute the stream of instructions in a sequence of stages with a diagnostic exception being taken between each stage. The method involves controlling the processor in a current stage, when a point is reached where the diagnostic exception is to be taken, to store in a storage location type indicator information comprising a type indicator for a current instruction in the stream and a type indicator for a next instruction in the stream. The diagnostic exception is then taken, causing a diagnostic operation to be performed which includes accessing the type indicator information from the storage location and, dependent on the type indicator for the current instruction and the type indicator for the next instruction, determining control information to identify at least one trigger condition for a next diagnostic exception. Thereafter, return from the diagnostic exception causes the processor to operate in a next stage in accordance with the determined control information. By capturing information not only about the current instruction being processed at the point that the diagnostic exception is to be taken, but also information about the next instruction, this can provide a significant improvement in the efficiency of the handling of the diagnostic process.

Method, apparatus and system for diagnosing a processor executing a stream of instructions

A data processing apparatus executes call instructions, and after a sequence of instructions executed in response to a call instruction a return instruction causes the program flow to return to a point in the program sequence associated with that call instruction. The data processing apparatus is configured to speculatively execute instructions in dependence on a predicted outcome of earlier instructions and a return address prediction unit is configured to store return addresses associated with unresolved call instructions. The return address prediction unit comprises: a stack portion onto which return addresses associated with unresolved call instructions are pushed, and from which a return address is popped when a return instruction is speculatively executed; and a buffer portion which stores an entry for each unresolved call instruction executed and for each return instruction which is speculatively executed.

Return address prediction

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Arcueil, France

Clément Marc Demongeot