Sgs-Thomson Microelectronics Limited

Clyde A Marlow

William A Phillips

A circuit and method for generating a power-on reset signal with a designable hysteresis is disclosed. The circuit includes a low voltage stage, a high voltage stage, and a hysteresis stage. The low voltage stage includes a resistor in series with a current mirror. The high voltage stage includes a current mirror in series with a diode and two resistors. The hysteresis circuit includes a transistor connected across one of the two resistors. The method for generating the power-on reset signal includes the steps of sinking a power-on reset signal low when a voltage source reaches a first V.sub.be voltage threshold; driving the power-on reset signal high when the voltage source reaches a second threshold value; and providing hysteresis to the power-on reset signal.

Growing community of inventors

Ann Arbor, MI, United States of America

Clyde A Marlow