Altera Corporation

Clive Davies

Andrew Martyn Draper

Andrew Crosland

Chris Dettmar

Iain Scott

Paul Riley

Methods and systems for memory interface systems are provided. A first command from control circuitry is received by bridge circuitry at a first clock rate. The control circuitry is configured to operate at the first clock rate. A second command is generated by the control circuitry on the received first command. The second command is transmitted to memory circuitry at a second clock rate. The memory circuitry is configured to operate at the second clock rate, and the second clock rate is greater than the first clock rate.

Methods and apparatus for memory interface systems

A reconfigurable programmable logic system including a programmable logic device and an associated processor is configured using a configuration file including (a) instructions for configuring the programmable logic device as one or more peripherals to be used by the processor, and (b) a list of the peripherals to be configured in the programmable logic. The processor uses the peripheral data from the configuration file to load the appropriate drivers, create all necessary instances of the drivers and optionally to pass parameters for any necessary initial command after each driver is loaded. Optionally, each time the system is configured, any previously loaded drivers are first unloaded.

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Cumnor, United Kingdom

Clive Davies