Texas Instruments Corporation

Clinton L Montgomery

Brian Keith Kirkpatrick

Mark H Somervell

Rajesh B Khamankar

Husam N Alshareef

Malcolm John Bevan

April Gurba

Haowen Bu

Amitabh Jain

Jiong-Ping Lu

Andrew McKerrow

Donald S Miles

Ralf B Willecke

Melissa M Hewson

Glenn J Tessmer

Lu Jiong-Ping

Andrew J Mckerrow

The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region, wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer, and subjecting the exposed nitridated, high voltage dielectric to a high vacuum to remove the accelerant residue.

Post high voltage gate oxide pattern high-vacuum outgas surface treatment

The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer. The method further includes subjecting the exposed nitridated, high voltage dielectric to a plasma to remove the accelerant residue.

Dual-gate integrated circuit semiconductor device

An embodiment of the invention is a method of making a semiconductor structurewhere the spacer oxide layeris formed by a hydrogen free precursor CVD process. Another embodiment of the invention is a semiconductor structurehaving a spacer oxide layerwith a hydrogen content of less than 1%.

Reduced hydrogen sidewall spacer oxide

Post high voltage gate dielectric pattern plasma surface treatment

A process for forming nickel silicide and silicon nitride structure in a semiconductor integrated circuit device is described. Good adhesion between the nickel silicide and the silicon nitride is accomplished by passivating the nickel suicide surface with nitrogen. The passivation may be performed by treating the nickel silicide surface with plasma activated nitrogen species. An alternative passivation method is to cover the nickel silicide with a film of metal nitride and heat the substrate to about 500&deg; C. Another alternative method is to sputter deposit silicon nitride on top of nickel silicide.

Nickel silicide&mdash;silicon nitride adhesion through surface passivation

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Coppell, TX, United States of America

Clinton L Montgomery