Digital Equipment Corporation

Clinton Choi

Robert J Galuszka

Neal Andrew Crook

Andrew J Walton

John M Lenthall

Paul L Bruce

Vincent G Gavin

Bipin Mistry

An apparatus and method for supplying an address and data to an external memory device. The number of pins available for supplying the address is less than the number of address lines required at the external memory device. A register is used to store the high order bits of the address and is pre-loaded with a default page value. An output of the register is coupled to an address input of the external memory. If the high order bits of the address are equal to the default page value, a control device couples the data lines directly to the external memory device and a read or write operation follows. If the two values are different, a paging cycle is performed where the high order address bits are latched through the register to the address input of the external memory and then the data bits are coupled to the external memory device. If the default page value points to the most accessed portion of the external memory device, no paging is performed during access to that portion of the external memory and processing time is saved when reads or writes of data are made to that portion of the external memory.

Paged memory scheme

In an apparatus including a first and second processor coupled to a shared bit-RAM memory, simultaneous write operations can be performed without internal race conditions in the memory. Rather than using arbitration, a write is generated by logic in each processor only when data to be written is different from data currently stored in a given location. A processor can write data to the bit-RAM only when a write pulse has been generated by that processor. Clocking signals from the processors are used to insure that a read and a write operation are not performed by two separate processors.

Apparatus for simultaneous write access to a single bit memory

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Maindenhead, United Kingdom

Clinton Choi