Quantum Corporation

Dinoplusai Holdings Limited

Clifford M Gold

Timothy James Orsley

Bruce R Peterson

Michael G Machado

James A Henson

Daniel E Barnard

James H Do

Horia Cristian Simionescu

William G Moon

Lisa Fredrickson

Chung Kuang Chin

Thomas A Tacklind

Ronald R Moon

Trinh C Bui

Bryan John Mee

Hoa V Luong

Hang Diem Nguyen

Yujie Hu

Tong Wu

Stanley M Chang

Steven Sertillange

Yick Kei Wong

Minnie Uppuluri

George Li

Xiaosong Wang

Parminder Gill

Steve Paul

Zongwei Zhu

Luan Kha Bui

Embodiments described herein provide a mission-critical artificial intelligence (AI) processor (MAIP), which includes an instruction buffer, processing circuitry, a data buffer, command circuitry, and communication circuitry. During operation, the instruction buffer stores a first hardware instruction and a second hardware instruction. The processing circuitry executes the first hardware instruction, which computes an intermediate stage of an AI model. The data buffer stores data generated from executing the first hardware instruction. The command circuitry determines that the second hardware instruction is a hardware-initiated store instruction for transferring the data from the data buffer. Based on the hardware-initiated store instruction, the communication circuitry transfers the data from the data buffer to a memory device of a computing system, which includes the mission-critical processor, via a communication interface.

Mission-critical AI processor with record and replay support

A method and apparatus for arbitrating requests for access to a single buffer memory embedded within a disk drive in which a disk data channel is assigned a highest priority for buffer access within a queue. An arbitration cycle progressively services access requests pending within the queue, beginning with providing buffer access to the disk data channel and following with accesses to other channels during an arbitration cycle completion interval in accordance with a round-robin circular priority arrangement providing orderly access to all channels contending for memory access. At the end of completion interval, buffer access returns to the disk data channel, and thereafter, the arbitration cycle is repeated.

Time allocation shared memory arbitration for disk drive controller

A method for managing data blocks in a cache buffer defining date block segments, and for automatically transferring data into and out of the cache buffer. A cache list comprises a plurality of entries each including information identifying a corresponding cache segment, and a set of consecutive data blocks stored in the cache segment. Providing cache status for a requested set of date blocks includes traversing the cache list to locate entries identifying the starting data block in the requested set, and consecutive data blocks successively following the starting data block without interruption, and identifying as a missing data block the first data block in said succession, including said starting data block, not identified in any entry. The missing data block is used to provide status: a full hit if the missing data block is not in the requested set; a miss if the missing data block is the starting data block in the requested set, or a partial hit otherwise. In response to a write command for a new set of data, the cache list is traversed to locate all entries identifying sets of data blocks overlapping the new set. If a located entry identifies a set of data blocks fully overlapping the new set, there is a full hit. If no entry is located, there is miss. Otherwise, there is a partial hit. The new set can be automatically transferred into a predesignated buffer area selected by the cache manager.

Embedded cache manager

An insulation displacement connector that includes a plurality of apertures disposed through a mating face and a ribbon-contacting face of the insulation displacement connector. The mating face is configured to mate with a complementary connector complementary in gender to the insulation displacement connector. The ribbon-contacting face is disposed opposite the mating face and configured for coupling with an interspersed ground conductor ribbon cable having a plurality of parallel insulated conductors. The insulation displacement connector includes a plurality of first conductor coupling structures. Each of the first conductor coupling structures is disposed in one of the plurality of apertures and is configured to couple to one of first designated conductors of the plurality of parallel insulated conductors and a contact on the complementary connector when the complementary connector is coupled to the insulation displacement connector at the mating face. The insulation displacement connector farther includes a second conductor coupling structure disposed at the ribbon-contacting face. The second conductor coupling structure is configured to couple with a second designated conductor of the plurality of parallel insulated conductors different from the first designated conductors. The second designated conductor is coupled to ground during use and represents a shielding ground conductor to reduce inductive crosstalk between first selected ones of the first designated conductors.

Interspersed ground ribbon cable assemblies and methods therefor

A method of coordinating access to a data buffer including a plurality of data blocks, using a buffer list with a plurality of entries corresponding to the data blocks. Each buffer list entry includes: (i) a status code for indicating the status of data in the corresponding data block, and (ii) a partial address common to both the next buffer list entry and a data block corresponding to said next buffer list entry. A status code is selected from a cyclical set of sequential status codes having a period of N, the status codes sequentially, and alternately, representing the most recent history of a data block, including: (i) full status, indicating data in the data block has been retrieved from the storage device or is to be stored to the storage device, or (ii) empty status, indicating data transferred out of the data block to a host or to the storage device. A store flag maintains a status code representing empty status, and a retrieve flag maintains a status code representing full status. When storing data into the data buffer, locating a desired buffer list entry list with an empty status code by traversing the buffer list, calculating the address of each entry using the partial address in the previous entry, until the desired entry is found. The address of the data block corresponding to the found entry is calculated and data is stored in the data block when the status code of the entry matches the store flag status code. The found entry status code is advanced once, and if the entry is last in the buffer list the store flag status code is advanced twice. Similarly, when retrieving data from the data buffer, locating a desired entry in the buffer list with a full status code by traversing the buffer list, calculating the address of each entry using the partial address in the previous entry, until the desired entry is found. The address of the data block corresponding to the found entry is calculated and data is retrieved from the data block when the status code of the entry matches the retrieve flag status code. The found entry status code is advanced once, and if the entry is last in the buffer list the retrieve flag status code is advanced twice.

Buffer management and system coordination method

An insulation displacement connector that includes a plurality of apertures disposed through a mating face and a ribbon-contacting face of the insulation displacement connector. The mating face is configured to mate with a complementary connector complementary in gender to the insulation displacement connector. The ribbon-contacting face is disposed opposite the mating face and configured for coupling with an interspersed ground conductor ribbon cable having a plurality of parallel insulated conductors. The insulation displacement connector includes a plurality of first conductor coupling structures. Each of the first conductor coupling structures is disposed in one of the plurality of apertures and is configured to couple to one of first designated conductors of the plurality of parallel insulated conductors and a contact on the complementary connector when the complementary connector is coupled to the insulation displacement connector at the mating face. The insulation displacement connector further includes a second conductor coupling structure disposed at the ribbon-contacting face. The second conductor coupling structure is configured to couple with a second designated conductor of the plurality of parallel insulated conductors different from the first designated conductors. The second designated conductor is coupled to ground during use and represents a shielding ground conductor to reduce inductive crosstalk between first selected ones of the first designated conductors.

According to the invention, a data integrity code including logical block address ('LBA') and circuit implementation are provided. The code and implementing circuitry are utilized to enable data block LBA verification during a block transfer and retrieval process. The preferred data integrity code has embedded LBA information and also serves as a crosscheck code used to detect miscorrection by an error correction code ('ECC'). In a preferred disk drive embodiment, data integrity block ('DIB') is provided to verify that the LBA value associated with a given data block in a host interface matches the value associated with that same data block in a buffer memory and in a data sequencer. In a preferred method of use, data integrity/cross-check redundancy with LBA is appended to data blocks transmitted to a buffer memory and verified after the data block has been transferred from the buffer. After verification, the LBA is preferably written to the storage medium together with its associated data block to enable later LBA verification for blocks recovered from the storage medium. The LBA may also be verified when the data block is transferred back to a host from the buffer memory.

Data integrity and cross-check code with logical block address

A programmable data sequencer transfers fixed length data blocks between variable length storage segments of a magnetic storage disk and a buffer memory within a data storage device. The data sequencer includes a stack memory for holding user byte count values read from a header field preceding each data sector having variable length split storage segments. Each byte count value indicates respective length of a following variable length storage segment, so that the storage capacity of each segment is dynamically determined by the data sequencer in real time by popping the user byte count value from the stack into a storage segment length counter and by counting down the count value within the segment length counter.

Miniature disk drive having embedded sector servo with split data fields

A magnetic data storage disk record carries a pattern of magnetic domains defining a plurality of concentric data tracks divided into data sectors by embedded servo sectors recorded at a predetermined constant frequency and containing head positioning information for positioning a data transducer head for reading the disk track. Each data sector is recorded at a data transfer rate selected in relation to displacement of the track from a center of the disk. Each data sector defines a plurality of variable length data segments which are combined to provide a fixed length user data block. In order to avoid a write-to-read transition and Barkhausen noise, each data sector begins with an ID header immediately following a servo sector. The ID header includes a plurality of count byte fields for providing a count of bytes of each one of the user data segments within the data sector, and a flag field for indicating whether the user data block begins at the first data block segment of the particular data sector. A disk drive data sequencer using the count bytes and flag bytes is also disclosed.

Magnetic data storage disk drive with data block sequencing by using ID

A miniature disk drive achieves storage densities of at least approximately 1700 tracks per inch per storage surface of a storage disk defining a series of radially extensive servo sectors embedded within circumferential zones of data tracks. The sectors are recorded at a constant data transfer rate while each zone has a data transfer rate adapted to disk radius. The drive includes a head and head positioner, a read preamplifier for amplifying analog signals read from, and for amplifying signals to be written to, a storage surface. A circuit board carries drive electronics including a read channel, a servo processing circuit for recovering head location information from the servo sectors, a data block sequencer for sequencing data blocks between a buffer and the storage surface, a buffer memory controller for controlling the buffer, a bus level interface circuit for transferring data blocks between the buffer and a host computer, and a programmed digital controller which functions within a head position servo loop and which also controls the sequencer, buffer controller and bus level interface circuit. As one feature, the servo sectors split data blocks into segments. Segment byte counts in each data block header are used by the sequencer automatically to assemble the segments into data blocks during read and to divide the blocks into segments during write. A single VLSI circuit including the sequencer, servo processing circuit, memory controller and an interface to the microcontroller is disclosed.

High capacity submicro-winchester fixed disk drive

A method is provided for decoding a unique data sequence forming an address mark within a stream of RLL coded data values in order to start a byte clock for synchronizing operations within a data sequencer of a data storage system. The unique data sequence nominally comprises at least two adjacent sequences of zeros of a maximum permitted length occurring between three flux transitions under a predetermined RLL data code. This new method comprises the steps of: detecting a first flux transition, detecting a second flux transition, determining the number of zeros of a first zero sequence from the first flux transition to the second flux transitions, determining if the accumulated number of zeros of the first zero sequence is equal to the maximum permitted length, plus or minus one zero, and if so, detecting the third flux transition, determining the number of zeros of a second zero sequence from the second flux transition to a third flux transition, summing the numbers of zeros of the first and second sequences, determining if the sum is of the maximum permitted length, plus or minus one zero, and if so, starting the byte clock in relation to the determined first and second sequences and in relation to the time of detection of the third flux transition.

Growing community of inventors

Fremont, CA, United States of America

Clifford M Gold