Micron Technology Incorporated

Clement Jacob

Christopher W Petz

Durai Vishak Nirmal Ramaswamy

Vassil N Antonov

Terrence B McDaniel

Jaydeb Goswami

Vinay Nair

Luca Fumagalli

Albert Liao

Che-Chi Lee

Kehao Zhang

Albert P Chan

Fatma Arzum Simsek-Ege

Richard L Elliott

Some embodiments include an integrated assembly having first and second source/drain regions laterally offset from one another. Metal silicide is adjacent to lateral surfaces of the source/drain regions. Metal is adjacent to the metal silicide. Container-shaped first and second capacitor electrodes are coupled to the source/drain regions through the metal silicide and the metal. Capacitor dielectric material lines interior surfaces of the container-shaped first and second capacitor electrodes, A shared capacitor electrode extends vertically between the first and second capacitor electrodes, and extends into the lined first and second capacitor electrodes. Some embodiments include methods of forming integrated assemblies.

Integrated assemblies and methods forming integrated assemblies

A ferroelectric capacitor comprises two conductive capacitor electrodes having ferroelectric material there-between. At least one of the capacitor electrodes comprise MSiO, where 'M' is at least one of Ru, Ti, Ta, Co, Pt, Ir, Os, Mo, V, W, Sr, Re, Rh, Pd, La, Zn, In, Sig, and Nb, Other aspects, including method, are disclosed.

Ferroelectric capacitor, a ferroelectric memory cell, an array of ferroelectric memory cells, and a method of forming a ferroelectric capacitor

An example apparatus includes a first source/drain region and a second source/drain region formed in a substrate. The first source/drain region and the second source/drain region are separated by the channel. The example apparatus further includes a gate separated from the channel by a dielectric material and an access line formed in a high aspect ratio trench connected to the gate. The access line includes a first titanium nitride (TiN) material formed in the trench, a metal material formed over the first TiN material, and a second TiN material formed over the metal material. The example apparatus further includes a sense line coupled to the first source/drain region and a storage node coupled to the second source/drain region.

Structure to reduce bending in semiconductor devices

A material deposition system comprises a dopant source containing at least one dopant precursor material, an inert gas source containing at least one noble gas, and a physical vapor deposition apparatus in selective fluid communication with the dopant source and the inert gas source. The physical vapor deposition apparatus comprises a housing structure, a target electrode, and a substrate holder. The housing structure is configured and positioned to receive at least one feed fluid stream comprising the at least one dopant precursor material and the at least one noble gas. The target electrode is within the housing structure and is in electrical communication with a signal generator. The substrate holder is within the housing structure and is spaced apart from the target electrode. A method of forming a microelectronic device, a microelectronic device, a memory device, and an electronic system are also described.

Material deposition systems, and related methods

A ferroelectric capacitor comprises two conductive capacitor electrodes having ferroelectric material there-between. At least one of the capacitor electrodes comprise MSiO, where 'M' is at least one of Ru, Ti, Ta, Co, Pt, Ir. Os, Mo, V, W, Sr, Re, Rh, Pd, La, Zn, In, Sn, and Nb. Other aspects, including method, are disclosed.

Growing community of inventors

Boise, ID, United States of America

Clement Jacob