Cray Incorporated

Hewlett Packard Enterprise Development LP

Cassatt Corporation

Clayton D Andreasen

Sanyam Mehta

Luiz DeRose

Heidi Lynn Poxon

David W Oehmke

William Homer

James D Engquist

Dann M Church

Craig A Lindley

A system is provided for allocating memory for data of a program for execution by a computer system with a multi-tier memory that includes LBM and HBM. The system accesses a data structure map that maps data structures of the program to the memory addresses within an address space of the program to which the data structures are initially allocated. The system executes the program to collect statistics relating to memory requests and memory bandwidth utilization of the program. The system determines an extent to which each data structure is used by a high memory utilization portion of the program based on the data structure map and the collected statistics. The system generates a memory allocation plan that favors allocating data structures in HBM based on the extent to which the data structures are used by a high memory utilization portion of the program.

Memory allocation system for multi-tier memory

An error message handling buffer comprises a first buffer and a second buffer. A first index is associated with the first buffer and a second index is associated with the second buffer. A buffer controller is operable to write and read messages in the buffer, such that messages are written to the buffer of the first and second buffers that has a buffer index value lesser than the buffer size, and read from the other of the first and second buffers, the other buffer having an index value greater than or equal to the buffer size.

Multiple error management in a multiprocessor computer system

A distributed computing system contains one or more application nodes. One or more control nodes provide for the efficient and automated allocation and management of computing functions and resources within the distributed computing system. The control node includes an automation subsystem that provides autonomic power control for the application nodes, regardless of which vendor manufactured the application nodes. For power controllers not specifically supported by the distributed computing system, a universal power controller responds to power down instructions by causing a targeted application node to execute an idle software image and reports that the application node has been successfully powered down.

System and method for causing an idle image to execute on an application node of a distributed computing system when instructed to power down

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Rosemount, MN, United States of America

Clayton D Andreasen