International Business Machines Corporation

Clay Chip Smith

Wolfgang Roesner

Stephen Thomas Quay

Byron Lee Krauter

Carol Ivash Gabele

Alvan Wing Ng

Ali S El-Zein

Michael Alexander Bowen

Robert J Shadowen

Amy May Tuvell

Steven Arthur Schmidt

Method and apparatus for managing connections within a netlist include using a clone module to the connections between different components within the netlist. A buffer may be inserted between components of a netlist to split a connection into multiple segments and then moved into an associated first instance. The inclusion of the buffer allows for one or more of pin cloning and subway utilization to occur when mapping between a functional hierarchy to a physical hierarchy is performed.

Pin cloning and subway creation on automatically generated design physical hierarchy

An apparatus and method for determining power consumption in logic devices including mixed static and dynamic logic blocks is implemented. Input logical signals are tagged as having dynamical behavior or static behavior, and the power consumption of the logic block determined according to the behavior of the input signal. If an input signal has dynamic behavior, an output signal making a transition in response thereto will make two transitions per clock cycle, and the per cycle power consumption of the logic block is accordingly weighted. In another embodiment, a Boolean behavior signal is calculated for each block from clock phase tags and &ldquo;one cycle per cycle&rdquo; circuit level simulations. The per cycle power consumption of each logic block receives a weight in response to the Boolean behavior signal, according the behavior of the block characterized thereby.

Data processing system and method to estimate power in mixed dynamic/static CMOS designs

An integrated-circuit design is provided which is represented by a hierarchial data structure. In accordance with the method and system of the present invention, an integrated-circuit design which includes at least one parent circuit represented by a set of parent circuit level data and at least one child circuit represented by a set of child circuit level data. For an open circuit connection within the child circuit, a determination is made as to whether or not the open circuit connection is permissible. In response to a determination that the open circuit connection is permissible, another determination is made as to whether or not the number of I/O pins within the child circuit is greater than the number of open circuit connections within the child circuit. In response to a determination that the number of I/O pins within the child circuit is greater than the number of open circuit connections within the child circuit, the set of child circuit level data is integrated into the set of parent circuit level data. Finally, a determination is made as to whether or not the open circuit connection is closed within the integrated set of parent circuit level data. An error message will be displayed if the open circuit connection is not closed within the integrated set of parent circuit level data.

Method and system of checking for open circuit connections within an

Growing community of inventors

Austin, TX, United States of America

Clay Chip Smith