Compaq Computer Corporation, Inc.

Hewlett-packard Development Company, L.p.

Clarence Y Mar

Thanh Thien Tran

Javier F Izquierdo

Sompong Paul Olarig

John Erven Jenne

Paul R Culley

Alan L Goodrum

Barry S Basile

Richard O Waldorf

Raymond Y Chow

Pamela M Cook

A computer system includes a power supply coupled to a control logic, the power supply including a power_good output signal and Power output lines. The power_good signal notifies the control logic when the Power output lines have stabilized. The computer system also includes a plurality of voltage regulator modules (&ldquo;VRM&rdquo;) coupled to the control logic, wherein each VRM receives a power good signal from the control logic. A plurality of processors is also present in the computer system, each of the processors coupled to a VRM. Each of the VRMs transmits voltage to a processor to power-on the processor. Each VRM also transmits to its processor and to the control logic a voltage regulator module power good (&ldquo;VRMP_G&rdquo;) signal. The control logic includes means to control the sequential power-on of the processors so as to reduce the current sourcing requirements of the power supply and eliminate power supply surges.

CPU power sequence for large multiprocessor systems

A method for powering up a removable circuit card when it is inserted into a card slot of a computer system includes providing power and a clock signal to the circuit card. A communication link is electrically coupled to the circuit card after both the power and the clock signal are provided to the circuit card.

Removal and insertion of expansion cards in a computer system

A clock signal is distributed over a circuit board and across a connector as a sine wave. A circuit located near the clocked circuitry converts the sine wave into a same frequency square wave for use by the clocked circuitry. The output stage of the converter circuitry provides a high output level to drive CMOS circuitry. The output transistor is pulled up to 5 volts, but the preceding transistors are pulled up to 6.3 volts so that the base to emitter drops are compensated.

High frequency clock signal distribution with high voltage output

Sine wave clock distribution with high voltage output

Growing community of inventors

Austin, TX, United States of America

Clarence Y Mar