Alereon, Inc.

Clair A Hardesty

Martin G Gravenstein

Andrew Probst

Nirmalendu B Patra

Dave Ohmann

Systems and methods for providing efficient memory allocation, reduced processor intervention and power consumption, and increased memory access bandwidth. One embodiment comprises a system including a plurality of memory units which are accessible in parallel, a dynamic memory unit configured to dynamically allocate and deallocate storage space in the memory units, and a plurality of direct memory access (DMA) engines configured to access the memory units in parallel through the memory management subsystem. The system may be implemented in the MAC engine of a device that communicates with other devices via a wireless communication link. This embodiment may store packets in FIFOs within the memory units as elements of linked list data structures that can be joined together without having to move the previously stored data. DMA engines access a context table to obtain DMA channel information that enables them to move data through appropriate DMA channels.

Growing community of inventors

Georgetown, TX, United States of America

Clair A Hardesty