Other

Nxp B.v.

Cindy Goldberg

Janos Farkas

Srdjan Kordic

Errol Todd Ryan

John A Iacoponi

Yeong-Jyh Tom Lii

Yuri Solomentsev

A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device. In one example, the passivating coupling material has multiple Si atoms in its chemical composition, which desirably increases the thermal stability of the material.

Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereor, and material for coupling a dielectric layer and a metal layer in a semiconductor device

Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device

The present invention provides a low-k dielectric constant structure and method of forming the same on a substrate that features having a dielectric layer with differing regions of density and . To that end, the method includes depositing, upon the substrate, a dielectric layer having first and second density regions. The density associated with the second density region being greater than the density associated with the first density region, and the first density region being disposed between the substrate and the second density region.

Method and structure for low-k dielectric constant applications

This disclosure describes use of dielectric islands embedded in metallized regions of a semiconductor device. The islands are formed in a cavity of a dielectric layer, as upright pillars attached at their base to an underlying dielectric. The islands break up the metal-dielectric interface and thus resist delamination of metal at this interface. The top of each island pillar is recessed from the cavity entrance by a selected vertical distance. This distance may be varied within certain ranges, to place the island tops in optimal positions below the top surface plane of the dielectric. Metallization introduced into the cavity containing the islands, submerges the island tops to at least a minimum distance to provide a needed minimum thickness of continuous metal. The continuous metal surface serves favorably as a last metal layer for attaching solder or for bump-bonding package to the IC; and also serves as an intermediate test or probe pad in an interior layer.

Integrated circuit structure with dielectric islands in metallized regions

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Austin, TX, United States of America

Cindy Goldberg