Infineon Technologies Ag

Cindy Blair

Thomas W Moller

Nagaraj V Dixit

Tan Pham

A power transistor, having: a semiconductor having an electrode formed thereon, wherein the electrode comprises a plurality of interdigitated transistors each having input and output terminals; a first output blocking capacitor having a first terminal electrically coupled to the output terminals of the interdigitated transistors of the semiconductor and a second terminal electrically coupled to ground; and a second output blocking capacitor having a first terminal electrically coupled to the first terminal of the first output blocking capacitor and a second terminal electrically coupled to ground. A method for amplifying signals, the method having: forming a power transistor on a semiconductor, wherein the power transistor comprises a plurality of interdigitated transistors; shunting an output signal from the plurality of interdigitated transistors; and double-shunting an output signal from the plurality of interdigitated transistors, wherein the shunting and double-shunting generates first and second harmonic terminations at a die plane of the power transistor.

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Santa Clara, CA, United States of America

Cindy Blair