Marvell Asia Pte., Ltd.

Cindra Abidin

Liang Fan

Fazil Ahmad

Quanli Lu

Espen Olsen

Pera Florin

Linghsiao Wang

A time-interleaved digital-to-analog converter for an optical transmitter includes a DAC core having a plurality of slices and current sources for converting complementary data signals to analog signals at output nodes of the DAC core, a down switch circuitry configured to connect, for each slice of the DAC core, a current from one of the current sources to a first data input path or a second data input path respectively corresponding to first complementary data signals and second complementary data signals supplied to the slice of the DAC core, an up switch circuitry configured to connect the current to the output nodes, and a data switch circuitry configured to, for each slice of the DAC core, selectively connect the current received via the down switch circuitry and either the first data input path or the second data input path.

Low power time-interleaving DAC with pseudo interleaved architecture

A time-interleaved current-based digital-to-analog converter (current DAC) cell includes first input circuitry configured to receive a digital input signal, a first biasing voltage, a first clock, and a second clock. The first clock and the second clock having a phase offset from one another and having a common period. The current DAC also includes a first gate configured to, responsive to an 'ON' state of the first clock, pass the digital input signal to a second gate, the second gate being configured to, responsive to an ‘OFF’ state of the second clock, output a first DAC cell activation signal. The current DAC further includes first output circuitry configured to, responsive to the first DAC cell activation signal, output a first analog current signal based on (i) the digital input signal and (ii) the first biasing voltage.

Time-interleaved current-based digital-to-analog converter (current DAC)

A method for dynamically calibrating a time-interleaved digital-to-analog converter (DAC) includes receiving a digital input signal, generating, from the digital input signal, an output analog signal using DAC circuitry, generating, from the digital input signal, a model analog signal using DAC modeling circuitry, adjusting a digital model based on the model analog signal and the digital input signal, determining at least one of an offset error and a gain error based on comparing the output analog signal to the model analog signal, and generating an error correction signal based on the at least one of an offset error and a gain error.

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Irvine, CA, United States of America

Cindra Abidin