Vanguard International Semiconductor Corporation

Chyei-Jer Hsieh

Erik S Jeng

Ing-Ruey Liaw

Hsu-Li Cheng

I-Ping Lee

Teng-Shao Su

Shun-Min Yeh

Yu-Chen Ho

Fsien-Fu Meng

Ching-Yun Chu

A method of forming a polysilicon spacer with a vertical profile. A dielectric layer and a sacrificial layer are successively deposited to cover the entire surface of a polysilicon layer that covers an insulating structure. Then, CMP is used to remove parts of the sacrificial layer, the dielectric layer and the polysilicon layer to reach a planarized surface. Then, a part of the polysilicon layer outside the insulating structure is removed to make the insulating structures protrude from the top of the polysilicon layer. After removing the sacrificial layer, forming a second oxide layer on the exposed surface of the polysilicon layer and removing the dielectric layer, dry etching is used to remove the polysilicon layer that is not covered by the second oxide layer. The polysilicon layer left under the second oxide layer serves as a polysilicon spacer with a vertical profile.

Method for forming a polysilicon spacer with a vertical profile

An etching back process to improve topographic planarization of a polysilicon layer. First, a polysilicon layer is formed to fill a contact hole between two adjacent insulating structures and cover the entire surface of a semiconductor substrate to a predetermined height, in which a sunken portion is formed in the polysilicon layer over the contact hole. Then, a bottom antireflective coating (BARC) layer is formed to fill the sunken portion and cover the entire surface of the polysilicon layer. Next, in a first etching step, the BARC layer outside the sunken portion of the polysilicon layer is removed and the BARC layer in the sunken portion of the polysilicon layer is retained to flatten the bottom of the sunken portion. Thereafter, in a second etching step, the etching rate of the polysilicon is decreased and the etching rate of the BARC layer is increased to remove a part of the polysilicon layer outside the sunken portion and retain some of the BARC layer inside the sunken portion, in which the BARC layer remaining in the sunken portion protrudes from the polysilicon layer. Next, the polysilicon layer outside the contact hole is completely removed.

Etching back process to improve topographic planarization of a polysilicon layer

A method for etching a metal layer on a substrate with dimensional control is disclosed. First, an anti-reflection layer is formed over the metal layer. A photoresist layer is then formed over the anti-reflection layer. A metal layer pattern is defined by patterning the photoresist layer. An etching process is performed to etch the anti-reflection layer with dimensional loss compared with the metal layer pattern, by using the photoresist layer as a mask. Another etching process is performed to etch the metal layer with dimensional gain compared with the anti-reflection layer, by using the anti-reflection layer as a mask. A metal layer with nearly zero-biased dimension is achieved.

Method for etching a metal layer with dimensional control

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Tainan, Taiwan

Chyei-Jer Hsieh