Qualcomm Incorporated

Chunping Song

Hector Ivan Oporta

Ta-Tung Yen

Cheong Kun

Guoyong Guo

Stuart Pullen

Sanghwa Jung

Christian Gregory Sporck

Jialei Xu

Yue Jing

Georgios Konstantinos Paparrizos

Neal L Horovitz

Steve Hawley

Xiaolin Gao

Michael Bui

Yi Wang

Jiwei Chen

Aaron Melgar

Shashank Prakash Mane

William Rader

David Wong

Zhaohui Zhu

Rashed Hoque

Daragh Padraic MacGabhann

Daryl Bergstrom

Ahmed Abdelmoaty

Ji Hoon Hyun

David King Wai Li

An apparatus is disclosed for adaptive multi-mode charging. In an example aspect, the apparatus includes at least one charger having a first node and a second node. The at least one charger is configured to accept an input voltage at the first node. The at least one charger is also configured to selectively operate in a first mode to generate a first output voltage at the second node that is greater than or less than the input voltage or operate in a second mode to generate a second output voltage at the second node that is substantially equal to the input voltage.

Adaptive multi-mode charging

Methods and apparatus for trickle charging and precharging a dead multi-cell-in-series battery. One battery charging circuit generally includes a charge pump circuit comprising a plurality of switches, being coupled to first and second power supply nodes, and being configured to multiply (or divide) a first voltage at the first power supply node to generate a second voltage at the second power supply node; a driver circuit configured to drive the plurality of switches in the charge pump circuit; and an arbiter having a first input coupled to the first power supply node, a second input coupled to the second power supply node, a third input coupled to a third power supply node having a third voltage, and an output coupled to a power supply terminal of the driver circuit. The arbiter is configured to select between the first, second, and third voltages to power the driver circuit.

Battery charging circuit and methods for trickle charging and precharging a dead multi-cell-in-series battery

A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

Three-level buck converter configurable for two-level buck converter mode operation

An apparatus is disclosed for parallel charging of at least one power storage unit. In example implementations, an apparatus includes a charging system. The charging system includes a first charger having a first current path and a second charger having a second current path. The charging system also includes a charging controller coupled to the first current path. The charging system further includes an indication path coupled between the second current path and the charging controller.

Parallel charging

A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

Universal serial bus (USB) type-c and power delivery port with scalable power architecture

Certain aspects of the present disclosure generally relate to an adaptive combination power supply circuit. The adaptive combination power supply circuit may be capable of switching between performing as a three-level buck converter and as a divide-by-two charge pump. One example power supply circuit generally includes a first transistor; a second transistor coupled to the first transistor via a first node; a third transistor coupled to the second transistor via a second node; a fourth transistor coupled to the third transistor via a third node; a capacitive element having a first terminal coupled to the first node and a second terminal coupled to the third node; an inductive element having a first terminal coupled to the second node; and a switch having a first terminal coupled to the first terminal of the inductive element, the switch having a second terminal coupled to a second terminal of the inductive element.

Adaptive combination power supply circuit and charging architecture

Power supply circuit having low quiescent current for a bypass mode. One example power supply circuit generally includes a transistor; a switching node coupled to a source of the transistor; a power supply rail; a capacitor having a first terminal coupled to the power supply rail and having a second terminal coupled to the switching node; a gate driver having an output coupled to a gate of the transistor, having a first power input coupled to the power supply rail, and having a second power input coupled to the switching node; logic having a first input coupled to the first terminal of the capacitor, having a second input coupled to the second terminal of the capacitor, and having a first output; and a pullup circuit having a control input coupled to a second output of the logic and having an output coupled to the gate of the transistor.

Power supply circuit with low quiescent current in bypass mode

An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.

High-efficiency low-ripple burst mode for a charge pump

Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit&#x2014;such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween&#x2014;in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).

Gate driver power-saving method for switched-mode power supplies in pulse-skipping mode

Techniques and apparatus for supplying power to gate drivers of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a SMPS circuit having a first input voltage node and a second input voltage node, and a charge pump. The charge pump generally includes a first capacitive element having a first terminal and a second terminal; a first switch coupled between a first input node of the charge pump and the first terminal of the first capacitive element; a second switch coupled between the second terminal of the first capacitive element and a second input node of the charge pump; a third switch coupled between the first terminal of the first capacitive element and the first input voltage node of the SMPS circuit; and a fourth switch coupled between the second terminal of the first capacitive element and the second input voltage node of the SMPS circuit.

Constant gate-to-source-volt age-driving driver architecture for switched-mode power supplies

Universal serial bus (USB) type-C and power delivery port with scalable power architecture

Methods and apparatus for current sensing and error correction in a switched-mode power supply composed of a high-side transistor coupled to a low-side transistor are described. One example method generally includes capturing a current associated with the low-side transistor at a first time corresponding to the low-side transistor turning off; capturing a current associated with the high-side transistor at a second time corresponding to a first delay after the high-side transistor turns on; capturing the current associated with the high-side transistor at a third time corresponding to the high-side transistor turning off; and applying a first correction current to a current-summing node of the current-sensing circuit for a first interval based on the first delay, wherein the first correction current is based on the captured current associated with the low-side transistor at the first time and on the captured current associated with the high-side transistor at the second time.

Lossless average input and output current sensing in a switched-mode power supply

Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.

Growing community of inventors

Sunnyvale, CA, United States of America

Chunping Song