Peking University

Canon Kabushiki Kaisha

Chunlei Wu

Ru Huang

Yangyuan Wang

Qianqian Huang

Jiaxin Wang

Chao Wang

Yaohai Huang

Xudong Zhao

A recognition apparatus for extracting first features of an object from a region of the object; obtaining second features of the object at least based on confidence information for first attribute of the object; determining sample information from pre-determined sample information based on the obtained second features; and recognizing the first attribute of the object based on the determined sample information.

Recognition apparatus and method

The present invention discloses a short-gate tunneling field effect transistor having a non-uniformly doped vertical channel and a fabrication method thereof. The short-gate tunneling field effect transistor has a vertical channel and the channel region is doped in such a slowly-varied and non-uniform manner that a doping concentration in the channel region appears as a Gaussian distribution along a vertical direction and the doping concentration in the channel near the drain region is higher while the doping concentration in the channel near the source region is lower; and double control gates are formed at both sides of the vertical channel and the control gates form an L-shaped short-gate structure, so that a gate underlapped region is formed in the channel near the drain region, and a gate overlapped region is formed at the source region.

Short-gate tunneling field effect transistor having non-uniformly doped vertical channel and fabrication method thereof

The present invention discloses a tunneling field effect transistor having a three-side source and a fabrication method thereof, referring to field effect transistor logic devices and circuits in CMOS ultra large scale integrated circuits (ULSI). By means of the strong depletion effect of the three-side source, the transistor can equivalently achieve a steep doping concentration gradient for the source junction, significantly optimizing the sub-threshold slope of the TFET. Meanwhile, the turn-on current of the transistor is boosted. Furthermore, due to a region uncovered by the gate between the gate and the drain, the bipolar conduction effect of the transistor is effectively inhibited, and on the other hand, in the small-size transistor a parasitic tunneling current at the corner of the source junction is inhibited. The fabrication method is simple and can be accurately controlled. By forming the channel region using an epitaxy method subsequent to etching, it facilitates to form a steeper doping concentration gradient for the source region or form a hetero-junction. Moreover, the fabrication flow of the post-gate process facilitates to integrate a high-k gate dielectric/a metal gate having good quality, further improving the performance of the transistor.

Tunneling field effect transistor having a three-side source and fabrication method thereof

Growing community of inventors

Beijing, China

Chunlei Wu