Suzhou Centec Communications Co., Ltd.

Chunjian Yuan

Dong Wang

Yuanhan Li

Mingda Zhang

Provided is a verification system and a verification method for an Ethernet interface chip. The verification system comprises a Reconciliation Sublayer (RS), a Physical Coding Sublayer (PCS), a Physical Medium Attachment (PMA) layer, and a flow control unit connecting the RS and the PMA layer, wherein the PMA layer is provided with a PMA clock and a buffer, the buffer is configured to store data transferred from the PCS, and the PMA clock is configured to control the PMA layer to send the data in the buffer to an Ethernet interface chip to be tested.

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Jiangsu, China

Chunjian Yuan