Lam Research Corporation

Novellus Systems Incorporated

Chunhai Ji

Sirish K Reddy

Douglas L Keil

Yukinori Sakiyama

Adrien Lavoie

Karl Frederick Leeser

Edward J Augustyniak

Pramod Subramonium

Ishtak Karim

Nader Shamma

Yaswanth Rangineni

Bart Jan Van Schravendijk

Mandyam Sriram

Bin Luo

Bart K Van Schravendijk

Joseph Lindsey Womack

Xinyi Chen

Chengzhu Qi

Tuo Wang

A carrier ring configured to support a substrate during transport to or from a pedestal of a process tool and surrounding the substrate during processing is defined by, an inner annular portion having a first thickness, the inner annular portion defined to be adjacent a substrate support region of the pedestal; a middle annular portion surrounding the inner annular portion, the middle annular portion having a second thickness greater than the first thickness, such that a transition from a top surface of the inner annular portion to a top surface of the middle annular portion defines a first step; an outer annular portion surrounding the middle annular portion, the outer annular portion having a third thickness greater than the second thickness, such that a transition from the top surface of the middle annular portion to a top surface of the outer annular portion defines a second step.

Carrier ring wall for reduction of back-diffusion of reactive species and suppression of local parasitic plasma ignition

Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a deposition-etch-ash method to fill gaps in a pattern of a semiconductor substrate and eliminating spacer etching steps using a single-etch planarization method. Such methods may be performed for double patterning, multiple patterning, and two dimensional patterning techniques in semiconductor fabrication.

Image reversal with AHM gap fill for multiple patterning

Systems and methods are disclosed for plasma enabled film deposition on a wafer in which a plasma is generated using radiofrequency signals of multiple frequencies and in which a phase angle relationship is controlled between the radiofrequency signals of multiple frequencies. In the system, a pedestal is provided to support the wafer. A plasma generation region is formed above the pedestal. An electrode is disposed in proximity to the plasma generation region to provide for transmission of radiofrequency signals into the plasma generation region. A radiofrequency power supply provides multiple radiofrequency signals of different frequencies to the electrode. A lowest of the different frequencies is a base frequency, and each of the different frequencies that is greater than the base frequency is an even harmonic of the base frequency. The radiofrequency power supply provides for variable control of the phase angle relationship between each of the multiple radiofrequency signals.

Systems and methods for using electrical asymmetry effect to control plasma process space in semiconductor fabrication

Methods of forming high etch selectivity, low stress ashable hard masks using plasma enhanced chemical vapor deposition are provided. In certain embodiments, the methods involve pulsing low frequency radio frequency power while keeping high frequency radio frequency power constant during deposition of the ashable hard mask using a dual radio frequency plasma source. According to various embodiments, the low frequency radio frequency power can be pulsed between non-zero levels or by switching the power on and off. The resulting deposited highly selective ashable hard mask may have decreased stress due to one or more factors including decreased ion and atom impinging on the ashable hard mask and lower levels of hydrogen trapped in the ashable hard mask.

High selectivity and low stress carbon hardmask by pulsed low frequency RF power

Method for forming a mask by etching conformal film on patterned ashable hardmask

Techniques, systems, and apparatuses for performing carbon gap-fill in semiconductor wafers are provided. The techniques may include performing deposition-etching operations in a cyclic fashion to fill a gap feature with carbon. A plurality of such deposition-etching cycles may be performed, resulting in a localized build-up of carbon film on the top surface of the semiconductor wafer near the gap feature. An ashing operation may then be performed to preferentially remove the built-up material from the top surface of the semiconductor wafer. Further groups of deposition-etching cycles may then be performed, interspersed with further ashing cycles.

Carbon deposition-etch-ash gap fill process

Growing community of inventors

Portland, OR, United States of America

Chunhai Ji