Hon Hai Precision Industry Co., Ltd.

Timotion Technology Co., Ltd.

Cvicloud Corporation

Chung-Yi Chen

Dong-Jye Lin

Chang-Lin Tu

Chi-Hung Chan

An FET, a method for manufacturing such FET, and an integrated circuit are disclosed. The FET includes a substrate carrying a gate electrode, a gate dielectric layer, and a channel layer sequentially stacked on the substrate. An insulating layer, an etching stop layer, and a protective layer are stacked sequentially on the channel layer. Source and drain electrodes are also formed. A material of the channel layer includes a 2D material. The FET defines two through holes extending through the insulating layer, the etching stop layer, and the protection layer and the channel layer is exposed, the two through holes carry the source and drain electrodes to form a top or direct contact with the channel layer.

Field effect transistor, preparation method thereof and integrated circuit

A semiconductor with 3D flash memory storing cells includes a stack structure in each storing cell, a blocking layer, at least one floating gate layer, a tunnel dielectric layer, and a channel layer. The stack structure includes at least one control gate layer, at least one dielectric layer, and at least one erasing layer. The blocking layer is coplanar with the control gate layer. The floating layer is received in the blocking layer, and insulates the control gate layer by the blocking layers. The tunnel dielectric layer covers sides of the blocking layer and the floating gate layer. The channel layer is placed on a side of the tunnel electric layer. When the storing cell executes a data reading and writing process, a voltage is applied on the erasing layer to reduce a series resistance of the channel layer for rapid conduction by the semiconductor.

Semiconductor with faster conduction for rapid writing to memory

A semiconductor with 3D flash memory storing cells giving an extended life time includes a stack structure in each storing cell, a receiving space crossing through the stack structure, a blocking layer, at least one floating gate layer, and a channel layer. The stack structure includes at least one control gate layer, at least two dielectric layers, and at least one erasing layer. The receiving space comprises a first receiving portion communicating with several second receiving portions. The first receiving portion crosses through the stack structure and the second receiving portions are coplanar with the control gate layer. The blocking layer insulates the floating gate layer from the control gate layers. The erasing layer and floating gate layer form a passageway for electrons when data erasure is required in the semiconductor. A method for fabricating the semiconductor is also disclosed.

Semiconductor with extended life time flash memory and fabrication method thereof

A power semiconductor device includes a first electrode, a substrate, a first epitaxy layer, a second epitaxy layer, a gate electrode, and a second electrode. The substrate is located on the first electrode, and the substrate includes an active region and a termination region surrounding the active region. The first epitaxy layer is located on the substrate, and the first epitaxy layer has a first conductive type. The first epitaxy layer includes a first doped area and a second doped area. The first doped area has the first conductive type and is located in the termination region and the active region. The second doped area has a second conductive type and is located in the termination region. The second epitaxy layer is located on the first epitaxy layer. The gate electrode and the second electrode are located on the second epitaxy layer and are in the active region.

Power semiconductor device

A method for making a three-dimensional semiconductor structure includes: providing a substrate, forming a first insulating layer on the substrate, and defining at least one channel hole in the first insulating layer; forming a first epitaxial layer in each channel hole and forming a second epitaxial layer stacked on the first epitaxial layer; forming a sacrificial layer on the first insulating layer and exposing the second epitaxial layer relative to the sacrificial layer, forming another first epitaxial layer on the second epitaxial layer; forming a second insulating layer on the sacrificial layer, and forming another second epitaxial layer stacking on the another first epitaxial layer; repeating to form a plurality of sacrificial layers and a plurality of second insulating layers alternately stacked on the first insulating layer, and repeating to form a plurality of first epitaxial layers and a plurality of second epitaxial layers alternately stacked on the substrate.

Method of making a vertically-aligned three dimensional semiconductor structure

A method of single crystal growth includes disposing a polycrystalline source material in a chamber of a single crystal growth apparatus, disposing a seed layer in the chamber of the single crystal growth apparatus, wherein the seed layer is fixed below a lid of the single crystal growth apparatus, heating the polycrystalline source material by a heater of the single crystal growth apparatus to deposit a semiconductor material layer on the seed layer, and after depositing the semiconductor material layer, providing a coolant gas at a backside of the lid to cool down the seed layer and the semiconductor material layer.

Method of single crystal growth by controlling the heating of a source material and the cooling of a backside of a lid

A portable device for controlling an external electrical adjustable apparatus is provided. The portable device has a case, a signal transmitter connected to the electrical adjustable apparatus, a tilt sensor sensing a tilted angle and a controlling operation, a memory storing a threshold angle and a processor. The processor generates a controlling signal according to the controlling operation, and transmitting the controlling signal to an electrical adjustable apparatus for making the electrical adjustable apparatus raise/lower. The processor further determines that the electrical adjustable apparatus has collision when receiving a controlling signal used to control the electrical adjustable apparatus and the tilted angle is not less than the threshold angle, and sends a stopping signal to the electrical adjustable apparatus via the signal transmitter for making the electrical adjustable apparatus stop raising/lowering when determining that the electrical adjustable apparatus has collision.

Portable device for controlling electrical adjustable apparatus

A portable device for controlling an external electrical adjustable apparatus is provided. The portable device comprises a case, a signal transmitter connected to the electrical adjustable apparatus, a tilt sensor sensing a tilted angle, a memory storing a threshold angle and a processor. The processor determines that the electrical adjustable apparatus has collision when receiving a controlling signal used to control the electrical adjustable apparatus and the tilted angle is not less than the threshold angle, and sends a stopping signal to the electrical adjustable apparatus via the signal transmitter for making the electrical adjustable apparatus stop raising/lowering when determining that the electrical adjustable apparatus has collision. This present disclosed example can effectively prevent article placing on the carrying structure from falling and prevent the electrical adjustable apparatus or the obstacle from being damaged by continual stretching/shortening after collision.

A dimming switch device includes a key switch having a switching element controlled to be open-circuit or closed-circuit, a rectifying diode to rectify input AC voltages according to the state of the switching element, a power state coupling circuit, a controller, and a driving circuit. The key switch and the power state coupling circuit together generate a signal to inform the controller whether the switching element is open-circuit or closed-circuit through a pair of power lines that transmit both the signal and the power required by the dimming switch device and an electric load driven by the driving circuit. Methods for determining user operation events over the dimming switch device are also provided as routines like: reset, one-click, N-click, so that a lamp load can be turned on and off and adjust brightness according to the user operation events.

Growing community of inventors

Taipei, Taiwan

Chung-Yi Chen