Realtek Semiconductor Inc.

Realtek Semiconductor Cotporation

Chung-Yao Chang

Kuang-Yu Yen

Der-Zheng Liu

Chuan-Hu Lin

Wei-Hsuan Chang

Chien-Wei Hsin

Tsung-Hsuan Lee

Yi-Syun Yang

Wei-Chieh Huang

Yu-Nan Lin

Shen-Chung Lee

Wei-Chi Lai

Yan-Yu Chen

Chih-Yung Wu

Kuei-Cheng Chan

Yu Kai Chen

Ming-Yuh Yeh

Wen-Yung Lee

Jiun-Hung Yu

Yu-Cheng Chen

Jyun-Wei Pu

Hao-Han Hsu

Chia-Chun Tsui

Kai-Jie Yang

Chung-Yen Liu

Kai-Wei Yen

Cheng-Jung Wu

A wireless communication chip includes an analog front-end circuit and a baseband circuit. The analog front-end circuit includes a first transceiver circuit and a second transceiver circuit, wherein the first transceiver circuit is arranged to transmit or receive signals through a first antenna, and the second transceiver circuit is arranged to transmit or receive signals through a second antenna. The baseband circuit is arranged to control the first transceiver circuit to use a first band or a second band for communication, and/or to control the second transceiver circuit to use the first band or the second band for communication. The baseband circuit controls the first transceiver circuit and the second transceiver circuit so that the analog front-end circuit alternately performs 2T2R in the first band and 2T2R in the second band.

Wireless communication chip that makes both 5 GHz band and 6 GHz band support two transmit and two receive paths

This invention discloses a method for controlling a wireless communication device to reduce the number of retry times of data packets during transmission. The method includes steps of: using a first packet length to generate and transmit data packets; counting retry times of data packets in a predetermined time period and generating a result accordingly; and using a second packet length smaller than said first packet length to generate and transmit data packets when said result is greater than a predetermined value.

Wireless communication device and method of controlling same

A method for performing bit level management in a wireless local area network (WLAN) system, transmitter and receiver are provided. The method includes: calculating respective bit counts of one or more padding fields located in one or more locations within a packet in a transmitter within the WLAN system, respectively; and according to the respective bit counts of the one or more padding field, filling one or more sets of valid data corresponding to at least one predetermined bit count into the one or more padding fields, to replace one or more sets of redundant data. In addition, when a receiver within the WLAN system receives the packet that has the one or more sets of valid data, the WLAN system utilizes the one or more sets of valid data to enhance overall performance of the WLAN system.

Method for performing bit level management in a wireless local area network system, and associated transmitter and receiver

The present disclosure provides a decoding device. The decoding device includes an iteration number computing unit and a recursive decoder. The iteration number computing unit receives multiple packet parameters corresponding to a packet and computes a codeword-number-per-symbol according to packet parameters, in which the packet includes multiple symbols. The iteration number computing unit computes an iteration number according to the codeword-number-per-symbol. The recursive decoder is coupled to the iteration number computing unit, and performs a decoding operation on a codeword within a data field of the packet according to the iteration number.

Decoding device and decoding method

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder performs decoding operation according to a received data and an auxiliary data to obtain a target data and includes an error detection data generation circuit, a channel coding circuit, a selection circuit, and a Viterbi decoding circuit. The error detection data generation circuit performs an error detection operation on the auxiliary data to obtain an error detection data. The channel coding circuit, coupled to the error detection data generation circuit, performs channel coding on the auxiliary data and the error detection data to obtain an intermediate data. The selection circuit, coupled to the channel coding circuit, generates a to-be-decoded data according to the received data and the intermediate data. The Viterbi decoding circuit, coupled to the selection circuit, decodes the to-be-decoded data to obtain the target data.

Convolutional code decoder and convolutional code decoding method

A bandwidth detection device comprises a receiving circuit, for receiving a first plurality of frequency-domain signals on a first subchannel; a filter circuit, coupled to the receiving circuit, for transferring the first plurality of frequency-domain signals to a first plurality of filtered frequency-domain signals according to a filter function; and a processing circuit, coupled to the filter circuit, for comparing the first plurality of frequency-domain signals with the first plurality of filtered frequency-domain signals, to determine whether the first subchannel comprises first transmitted data.

Device and method of performing bandwidth detection

A wireless communication method applied to a beamformer includes: receiving a plurality of reference information corresponding to a plurality of stations, respectively; calculating an evaluation value for each of the stations according to at least one reference information of the plurality of reference information; and comparing a plurality of evaluation values respectively corresponding to the plurality of stations, to select specific stations from the plurality of stations for performing beamforming.

Beamformer and wireless communication method thereof for improving communication quality

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder and the convolutional code decoding method of the present invention perform decoding using predictive information, and therefore can demodulate/decode signals more quickly. Earlier completion of demodulation/decoding of signals can terminate the operation earlier and thereby achieve the effect of power savings. The convolutional code decoder performs decoding according to received data and auxiliary data to obtain target data, and includes a first error detection data generation circuit, a channel coding circuit, a first selection circuit, a first Viterbi decoding circuit, a second error detection data generation circuit, a comparison circuit, a second selection circuit, and a second Viterbi decoding circuit.

Disclosed is a symbol timing determining device including: a symbol timing detecting circuit detecting a reception signal to obtain a first symbol timing, and shifting the first symbol timing to obtain a second symbol timing; an estimation signal generating circuit processing the reception signal according to the first and the second symbol timings respectively, so as to obtain a first and a second channel estimation frequency-domain signals; a channel estimation impulse response signal generating circuit generating a first and a second channel estimation impulse response time-domain signals according to the first and the second channel estimation frequency-domain signals respectively; a power measuring circuit measuring the energy of the first and the second channel estimation impulse response time-domain signals according to a predetermined signal region respectively; and a decision circuit selecting one of the first and the second symbol timings according to a relation of the measured energy.

Symbol timing determining device and method

This invention discloses a method for controlling a wireless communication device to transmit data packets. The method includes steps of: transmitting data packets; counting retry times of data packets in a predetermined time period and generating a result accordingly; comparing said result with a predetermined value and generating a comparison result accordingly; and reducing transmission time of data packets according to said comparison result.

A receiving device comprises an iterative decoder, a first determination unit and a control unit. The iterative decoder is for receiving at least one coded signal and for performing an iterative decoding on the at least one coded signal, to generate a plurality of decoded signals, wherein the plurality of decoded signals comprise a first decoded signal from a first iteration, a second decoded signal from a second iteration and a third decoded signal from a third iteration. The first determination unit is for determining whether the plurality of decoded signals diverge, to generate a first determination result. The control unit is for generating a control signal according to at least the first determination result, wherein the control signal indicates the iterative decoder whether to stop performing the iterative decoding on the at least one coded signal.

Device and method of controlling an iterative decoder

A receiving device comprises a channel estimation unit, for generating a plurality of channel estimates according to a plurality of reference signals; an eigenvalue computation unit, coupled to the channel estimation unit, for generating at least one eigenvalue corresponding to the plurality of channel estimates according to the plurality of channel estimates; a channel compensation unit, coupled to the eigenvalue computation unit, for generating a correlation compensation value for compensating the plurality of channels according to the at least one eigenvalue; a channel capacity computation unit, coupled to the eigenvalue computation unit and the channel compensation unit, for generating a channel capacity according to the at least one eigenvalue and the correlation compensation value; and a selection unit, coupled to the channel capacity computation unit, for determining a modulation and coding scheme (MCS) according to the channel capacity.

Device and method for determining modulation and coding scheme based on channel capacity

A method of cell search for a mobile device in a wireless communication system is provided. The method comprises performing a reception timing detection procedure, to obtain at least a possible reception time for a primary synchronization signal (PSS), performing a PSS hypothesis procedure, to generate three frequency-domain PSS sequences according to three root indexes each corresponding to a physical layer identity, and performing a secondary synchronization signal (SSS) coherent detection procedure, to calculate a SSS sequence according to each of the at least a possible reception time with the three frequency-domain PSS sequences, to obtain a physical layer cell identity group corresponding to the SSS sequence.

Method of cell search

The present disclosure includes an ML (Maximum Likelihood) detector. An embodiment of the ML detector comprises a search value selecting circuit and an ML detecting circuit. The search value selecting circuit is configured to select a search value according to a communication index and a modulation type or determine the search value according to a predetermined value, in which the communication index is related to a reception signal or a derivative thereof, the search value is associated with a search range, and a number of candidate signal value(s) in the search range is not greater than a number of all candidate signal values of the modulation type. The ML detecting circuit is configured to execute an ML calculation according to the search value and one of the reception signal and the derivative thereof, so as to calculate a log likelihood ratio of every candidate signal value in the search range.

Maximum likelihood detector and detecting method, and wireless signal receiver with maximum likelihood detection function

A receiving device comprises a signal detection unit, a reliability unit coupled to the signal detection unit and a decoding unit coupled to the signal detection unit and the reliability unit. The signal detection unit is for receiving a plurality of compensated symbols on a plurality of subcarriers, to generate a plurality of soft information and a plurality demodulated symbols of the plurality of compensated symbols according to the plurality of compensated symbols. The reliability unit is for generating a plurality of weights of the plurality of soft information according to a plurality of reliability information of the plurality of subcarriers. The decoding unit is for decoding the plurality of demodulated symbols according to the plurality of soft information and the plurality of weights, to generate a plurality of decoded bits.

Growing community of inventors

Hsinchu County, Taiwan

Chung-Yao Chang