Thin Film Module, Inc.

Digital Equipment Corporation

Micromodule Systems, Inc.

Aptos Corporation

Kulicke and Soffa Industries, Inc.

Kulicke & Soffa Ind. Inc.

Chung W Ho

William C Robinette, Jr

Fariborz Agahdel

Robert John Moti

Syed A Husain

Bradley L Griswold

Brad Griswold

Tsing-Chow Wang

Byoung-Youl Min

Anna Litza

Michael I Grove

Ujwal Anant Deshpaude

Mark T McGraw

Chang-Ming Lin

B Y Min

A bare semiconductor circuit die carrier is provided for use in the test of semiconductor circuits, the carrier, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible membrane with particles deposited on the die contact pads; a fence upstanding from the membrane and sized to receive a test die; a top cap that rests upon the die when the die is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the die disposed therebetween.

Bare die carrier

A new method is provided for mounting high-density IC semiconductor devices. A layer of epoxy is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the epoxy layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of epoxy are created where the layer of epoxy is exposed. One or more IC semiconductor die are inserted into the cavities, are electrically connected to the openings that have been created in the layer of epoxy. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Low cost decal material used for packaging

A method is provided for mounting high-density wire bond semiconductor devices. A layer of dielectric is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the dielectric layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed. One or more wire bond semiconductor die are inserted into the cavities, are die bonded and wire bonded to the openings that have been created in the layer of dielectric. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

High density cavity-up wire bond BGA

Within a method for forming a solder interconnection structure for use within a microelectronic fabrication, there is first provided a substrate having formed thereover a bond pad. There is then formed upon the bond pad a first solder interconnection layer. There is then formed over the first solder interconnection layer an annular solder non-wettable copper oxide layer which does not cover an upper dome portion of the first solder interconnection layer. There is then formed over the upper dome portion of the first solder interconnection layer and not upon the annular solder non-wettable copper oxide layer a second solder interconnection layer.

Process to make a tall solder ball by placing a eutectic solder ball on top of a high lead solder ball

A new method is provided for mounting high-density flip chip BGA devices. A dielectric layer is first deposited over the first surface of a metal panel. One or more thin film interconnect layers are created on top of the dielectric layer. The interconnect layers are patterned in succession to create metal interconnect pattern. The BUM technology allows for the creation of a succession of layers over the thin film layers. The BUM layers can be used for power or ground distribution and for signal or fan-out interconnect. A cavity is etched on the second surface of the metal panel. A laser is used to create openings for flip chip pad contacts. The panel is subdivided into individual substrates. The method of the invention can also be applied to Land Grid Array and Pin Grid Array devices.

High density flip chip BGA

A new method is provided for packaging high-density IC semiconductor devices. A metal substrate is provided, a layer of dielectric is deposited over the first surface of the metal panel. One or more interconnect layers are then created on top of the dielectric layer, the interconnect layers, which can be thin film interconnect layers, are patterned using maskless exposure equipment. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed in the openings in the metal substrate thereby providing points of electrical contact to the second surface of the interconnect substrate. Holes are created in the first surface of the interconnect substrate thereby providing points of electrical contact to the first surface of the interconnect substrate. Bare semiconductor devices and/or packaged semiconductor devices can be attached on one or both sides of the interconnect substrate. Connector pads on the first surface of the interconnect substrate can be used to insert the substrate into a connector socket.

Quick turn around fabrication process for packaging substrates and high density cards

A new method is provided for high-density thin film interconnect processing. A thin layer of epoxy is deposited over a substrate surface, a via pattern is created in the epoxy layer, the surface of the epoxy is subjected to a process of swell and etch. A metal plating base is formed on the surface of the dielectric using electroless seeding for the metal deposition. A layer of photoresist is deposited over the plating base and is patterned and etched to create the pattern of the interconnect lines. Semi-additive plating of the interconnect pattern is performed to the plating base. The photoresist is removed. The plating base is removed from between the pattern of the interconnect lines using micro etching thereby creating the interconnect lines. A layer of dielectric is deposited over the surface of the created layer of interconnect lines. A via pattern is created in the dielectric layer. The process may be repeated more than once. Electrical contacts are made to the top metal pads through the top vias.

Low cost high density thin film processing

A new method is provided for mounting high-density wire bond semiconductor devices. A layer of dielectric is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the dielectric layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed. One or more wire bond semiconductor die are inserted into the cavities, are die bonded and wire bonded to the openings that have been created in the layer of dielectric. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

BGA package for high density cavity-up wire bond device connections using a metal panel, thin film and build up multilayer technology

A new method is provided for creating high-density packages for wire bonded chips. The invention uses a combination of BUM technology and thin film deposition techniques to create the required interface between the contact points of the BGA device and the contact balls of the BGA substrate. Cavities are created on the metal panel substrates for IC chip insertion.

High density wire bond BGA

A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured. The composite structure may be lapped down to minimize overall package thickness and to expose the backsides of the integrated circuit die for thermal management.

Growing community of inventors

Monte Sereno, CA, United States of America

Chung W Ho