Vanguard International Semiconductor Corporation

Industrial Technology Research Institute

Chung-Ren Lao

Chih-Cherng Liao

Wu-Hsi Lu

Shih-Hao Liu

Chu-Feng Chen

Hsing-Chao Liu

Ming-Cheng Lo

Wei-Chun Chou

Wei-Lun Chung

Chih-Wei Lin

Chien-Hsien Song

Hsiao-Ying Yang

Chih-Jen Huang

Yun-Chou Wei

Cheng-Yi Hsieh

An-Hung Lin

Yi-Hung Chiu

Pai-Chun Kuo

Hua-Chun Chiue

Hsin-Hui Lee

Chun-Hui Tsai

Ho-Ching Chien

Yin Jen Chen

Hsueh-Jung Lin

Wen-Chih Lu

Ting-Jung Lu

Kai-Chuan Kan

Jing-Da Li

Leuh Fang

Che-Hua Chang

Kuan-I Ho

Ching-Chung Chen

Kuo-Chien Hsu

Tzung-Hsian Wu

A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a first deep well region, at least two second well regions, at least one isolation structure and an implantation region. The first deep well region is disposed in the semiconductor substrate, wherein the first deep well region has a first conductivity type. The second well regions are disposed on the first deep well region, wherein the second well regions have a second conductivity type. The isolation structure covers a portion of the first deep well region and surrounds at least a portion of the second well regions. The implantation region is located under a top surface of the semiconductor substrate, wherein the implantation region has a discontinuous portion, and the discontinuous portion partially overlaps the first deep well region.

Semiconductor device

A diode structure includes a substrate having a first conductivity type, a first well region having a second conductivity type opposite to the first conductivity type and disposed in the substrate, a first doped region having the first conductivity type and disposed in the first well region, a ring-shaped well region having the second conductivity type, disposed in the first well region and surrounding the first doped region, an anode disposed on the first doped region, a second well region having the second conductivity type, separated from the first well region and disposed in the substrate, a second doped region having the second conductivity type and disposed in the second well region, and a cathode disposed on the second doped region.

Diode structure and semiconductor device

A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.

Semiconductor device including light-collimating layer and biometric device using the same

A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.

Color filters disposed in holes of a light collimator, manufacturing method of the same and biometric identification apparatus using the same

The present disclosure provides a high voltage semiconductor device includes a substrate, a first well region, a second well region, a source, a drain, a first electrode structure and a second electrode structure. The first well region and the second well region are disposed in the substrate, and which includes a first conductive type and a second conductive type which are complementary with each other. The source and the drain are respectively disposed within the first well region and the second well region. The first electrode structure and the second electrode structure are both disposed on the substrate, and the distance between the top surface of an electrode of the first electrode structure and the top surface of the substrate includes a first height and a second height which are different from each other.

High voltage semiconductor device

Semiconductor device including light-collimating layer

An optical sensor includes a substrate, a first/second/third well disposed in a sensing region, a deep trench isolation structure, and a passivation layer. The substrate has a first conductivity type and includes the sensing region. The first well has a second conductivity type and a first depth. The second well has the second conductivity type and a second depth. The third well has the first conductivity type and a third depth. The deep trench isolation structure is disposed in the substrate and surrounding the sensing region, wherein the depth of the deep trench isolation structure is greater than the first depth, the first depth is greater than the second depth, and the second depth is greater than the third depth. The passivation layer is disposed over the substrate, wherein the passivation layer includes a plurality of protruding portions disposed directly above the sensing region.

Optical sensor and method for forming the same

The present disclosure provides a high-voltage semiconductor device, including: a substrate; an epitaxial layer disposed over the substrate and having a first conductive type; a gate structure disposed over the epitaxial layer; a source region and a drain region disposed in the epitaxial layer at opposite sides of the gate structure respectively; and a stack structure disposed between the gate structure and the drain region, wherein the stack structure includes: a blocking layer; an insulating layer disposed over the blocking layer; and a conductive layer disposed over the insulating layer and electrically connected the source region or the gate structure. The present disclosure also provides a method for manufacturing the high-voltage semiconductor device.

High-voltage semiconductor device and method for manufacturing the same

An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.

Optical devices and fabrication method thereof

Embodiments of the disclosure relate to a semiconductor device. The semiconductor device includes a semiconductor substrate, a first metal wiring layer disposed on the semiconductor substrate, an interlayer dielectric layer (ILD) disposed on the first metal wiring layer, a second metal wiring layer disposed on the interlayer dielectric layer, and a first via and a second via disposed in the interlayer dielectric layer. The second via is on the first via, and there is not any metal wiring layer in the interlayer dielectric layer.

Semiconductor device and fingerprint sensor device thereof

A semiconductor device is disclosed. The semiconductor device includes a substrate having an isolation region and an active region defined by the isolation region. At least one trench is formed in the active region and extends along a first direction. A gate layer is disposed on the active region and extends along a second direction, wherein the gate layer conformably fills the at least one trench and covers a bottom surface and sidewalls of the at least one trench. The disclosure also provides a method for manufacturing the semiconductor device.

Semiconductor device having gate in trenches

A semiconductor device including a substrate having a drain region therein is provided. A gate-electrode layer is disposed on the drain region. A first field-plate conductor is disposed on the substrate and overlaps the drain region. A gap is located laterally between the first field-plate conductor and the gate-electrode layer. A second field-plate conductor covers the first field-plate conductor and the gap. The second field-plate conductor is separated from the first field-plate conductor. A method for forming the semiconductor device is also provided.

Semiconductor device and method for forming the same

A semiconductor device including a substrate having an isolation structure therein is disclosed. A capacitor is disposed on the isolation structure and includes a polysilicon electrode, an insulating layer disposed on the polysilicon electrode, and a metal electrode disposed on the insulating layer. A method for forming the semiconductor device is also disclosed.

A high-voltage semiconductor device is provided. The high-voltage semiconductor device includes a substrate; an epitaxial layer and a gate structure; a first conductive type first high-voltage well region and a second conductive type high-voltage well region disposed in the epitaxial layer at opposite sides of the gate structure respectively, wherein the first conductive type is different from the second conductive type; a source region and a drain region; and a stack structure disposed between the gate structure and the drain region, wherein the stack structure includes: a blocking layer; an insulating layer disposed over the blocking layer; and a conductive layer disposed over the insulating layer and electrically connected the source region or the gate structure. A method for manufacturing the high-voltage semiconductor device is also provided.

A high voltage semiconductor device is provided. The device includes a semiconductor substrate having a high voltage well with a first conductivity type therein. A gate structure is disposed on the semiconductor substrate of the high voltage well. A source doped region and a drain doped region are in the high voltage well on both sides of the gate structure, respectively. A lightly doped region with the first conductivity type is between the source and drain doped regions and relatively near to the source doped region. The disclosure also presents a method for fabricating a high voltage semiconductor device.

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Taichung, Taiwan

Chung-Ren Lao