National Kaohsiung University of Applied Sciences

Oriental System Technology Inc.

Chung-Nan Chen

Wen-Chie Huang

Jin-Shown Shie

Chen-Tang Huang

Chun-Hao Chen

Chih-Chun Chen

Chien-Hua Hsiao

A thermal sensing device comprises a substrate, a first insulating layer, at least one first sensing resistor, at least one second sensing resistor, a plurality of etching holes and a cavity. The first insulating layer is disposed on the substrate. The first sensing resistor is disposed above the first insulating layer. The second sensing resistor is disposed above the first insulating layer and isolated from the at least one first sensing resistor. The etching holes are disposed around the at least one first sensing resistor and the at least one second sensing resistor. The cavity is formed below the at least one first sensing resistor and the at least one second sensing resistor. The thermal sensing device is implemented in a measurement circuit to improve the problem that the signal becomes smaller when the sensing element is minimized.

Thermal sensing device

To form a single crystal silicon membrane with a suspension layer, a single crystal silicon substrate with crystal orientation &#x3c;111&#x3e; is prepared. A doped layer is formed on the top surface of the single crystal silicon substrate. Multiple main etching windows are formed through the doped layer. A cavity is formed through the single crystal silicon substrate by anisotropic etching. The doped layer is above the cavity to form a suspension layer. If two electrode layers are formed on the two ends of the suspension layer, a micro-heater is constructed. The main etching windows extend in parallel to a crystal plane {111}. By both the single crystal structure and different impurity concentrations of the single crystal silicon substrate, the single crystal silicon substrate has a higher etch selectivity. When a large-area cavity is formed, the thickness of the suspension layer is still controllable.

Single crystal silicon membrane with a suspension layer, method for fabricating the same, and a micro-heater

A chip-scale infrared emitter package comprises an emitter chip and an enclosure. The emitter chip includes: a base having a central cavity; a membrane having a peripheral end, the peripheral end being isolated from a periphery of the central cavity by a loop-shaped gap; an electric resistor formed on the membrane; at least one slim supporting beam extending from the peripheral end of the membrane through the loop-shaped gap to the base; and a reflective material coated on the membrane. The enclosure has a can housing and a transparent window plate. The window plate cooperates with the can housing to define an enclosed vacuum chamber. The emitter chip is mounted in the enclosed vacuum chamber. The enclosed vacuum chamber has a pressure less than 0.01 torr.

Chip-scale infrared emitter package

A metallic silicide resistive thermal sensor has a body, a conductive wire and multiple electrodes. The body has multiple etching windows formed on the body and a cavity formed under the etching windows. The etching windows separate the body into a suspended part and multiple connection parts. The conductive wire is formed on the suspended part and the connection parts and is made of metallic silicide. The electrodes are formed on the body and are electrically connected to the conductive wire. The metallic silicide is compatible for common CMOS manufacturing processes. The cost for manufacturing the resistive thermal sensor decreases. The metallic silicon is stable at high temperature. Therefore, the performance of the resistive thermal sensor in accordance with the present invention is improved.

Growing community of inventors

Taipei, Taiwan

Chung-Nan Chen