Samsung Electronics Co., Ltd.

Chung Ki Min

Ji Hoon Park

Seok Cheon Baek

Byoung Ho Kwon

Byung Kwan You

Boh Chang Kim

Hyun Ku Kang

Chang Sun Hwang

Han Sol Seok

Bo Un Yoon

Ki Hoon Jang

Dong Hoon Kwon

A method for fabricating a semiconductor device includes providing a polishing pad which includes a first region and a second region separated from each other by a fence, loading a wafer onto the first region, providing a slurry solution onto the first region, providing an ultrapure water onto the second region, turning the polishing pad to polish a surface of the wafer, and unloading the wafer from the polishing pad after polishing on the surface of the wafer is completed, wherein the fence includes a first fence extending from a center of the polishing pad toward an edge of the polishing pad in a first horizontal direction, and a second fence extending from the center of the polishing pad toward the edge of the polishing pad in a second horizontal direction different from the first horizontal direction.

Apparatus for polishing a wafer and method for fabricating a semiconductor device using the same

A semiconductor device includes a stacked structure on a substrate. The stacked structure includes stepped regions and a central region between the stepped regions, an upper insulation layer on the stacked structure, and a capping insulation layer on the stepped regions of the stacked structure. The capping insulation layer includes a first upper end portion and a second upper end portion that are adjacent to the upper insulation layer. The upper insulation layer is between the first upper end portion and the second upper end portion. The first upper end portion and the second upper end portion extends a first height relative to the substrate that is different from a second height relative to the substrate of the second upper end portion.

Method for forming a semiconductor device having protrusion structures on a substrate and a planarized capping insulating layer on the protrusion structures

A semiconductor device includes lower gate electrodes placed on a substrate and spaced apart from one another; upper gate electrodes placed over the lower gate electrodes and spaced apart from one another; an R-type pad extending from one end of at least one electrode among the lower gate electrodes or the upper gate electrodes and having a greater thickness than the lower gate electrode or upper gate electrode connected to the R-type pad; and a P-type pad extending from one end of at least one electrode to which the R-type pad is not connected among the lower gate electrodes or the upper gate electrodes and having a different thickness than the R-type pad, wherein the P-type pad includes a first pad connected to an uppermost lower gate electrode among the lower gate electrodes.

Semiconductor device including stack structures having gate pads with different thicknesses

Semiconductor device with a stacked structure and a capping insulation layer

Semiconductor device including stack structures having R-type pad and P-type pad of different thickness

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Hwaseong-si, South Korea

Chung Ki Min