Samsung Electronics Co., Ltd.

Chung-Gil Yang

Jae-Hoon Jeong

Jong-haeng Lee

Goog-Chun Cho

Pulse-width modulation (PWM) circuits and methods integrate a feedback signal and an input signal to generate an integral signal, and generate a PWM signal by switching an output node from a first source voltage to a second source voltage based upon comparing the integral signal with a first reference voltage, and switching the output node from the second source voltage to the first source voltage based upon comparing the integral signal with a second reference voltage. A comparator unit compares the integral signal with the first and second reference (threshold) voltages, and a drive circuit for buffering the comparator unit's output signals generates drive signals. A feedback circuit generates the feedback signal based on (e.g., proportional with) the PWM signal. The switching circuit may include a P-type switch (e.g., PMOS transistor) and a N-type switch (e.g., NMOS transistor). Associated class-D audio amplifiers and modulation methods are provided.

Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods

A class-D power amplifier, which prevents excessive response phenomenon from occurring when returning to a steady state from an abnormal state and an amplification method of the class-D power amplifier are provided. The class-D power amplifier prevents an integral control circuit or a proportional integral control circuit from becoming saturated by using sub-negative feedback loop operations, without using a high-capacity output blocking switch in an initial state or an abnormal state. Thus, suppressing pop noise due to the excessive response phenomenon caused when the class-D power amplifier returns to the steady state from the initial state or the abnormal state and reducing power consumption.

Class-D power amplifier capable of eliminating excessive response phenomenon when returning to a steady state from an abnormal state and an amplification method thereof

Disclosed is a frequency shift keying (FSK) signal demodulator which demodulates binary data encoded in FSK format. A square wave generator generates a continuously repeating square wave signal by detecting zero-crossings of an FSK-modulated signal having a first frequency and a second frequency. The square wave signal is sampled at a sampling rate. A counter and its control circuit counts the number of the sampled signals during 1 bit data transmission time slots. A comparator compares the count number with two predetermined reference values and outputs the binary data.

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Gunpo-si, South Korea

Chung-Gil Yang