Synopsys, Inc.

Chun-Yi Lo

Kuen-Yang Tsai

Yung-Chuan Chen

A method is presented for responding to user input by displaying when a circuit has a property expressed by an assertion based on data indicating values of signals of the circuit at a succession of times. The assertion expresses the property as a first sequence of expressions, and separately defines for each expression a corresponding evaluation time relative to the succession of times at which the expression is to be evaluated. The circuit has the property only if every expression of the first sequence evaluates true at its corresponding evaluation time. The method includes displaying a representation of each expression of the first sequence and identifying each variable that caused that expression to evaluate false and distinctively marking that variable's symbol relative to other variable symbols within the display for each expression of the first sequence that evaluates false at its corresponding evaluation time.

Active trace assertion based verification system

A computer processes simulation data indicating values of circuit signals as functions of simulation time to determine whether a circuit exhibits a property defined by an assertion. The assertion expresses the property as a sequence of expressions, each a function of one or more variables, where each variable represents a value of one or more signals or a value of another sequence of expressions. The assertion statement separately defines an evaluation time for each expression, a particular simulation time at which the expression is to be evaluated. Each expression must evaluate true if the circuit has the property. The computer produces a display including a representation of each expression of the property including a separate variable symbol for each of its variables. For each expression that evaluated false, the computer identifies each variable that caused that expression to evaluate false and distinctively marks that variable's symbol relative to other variable symbols within the display. For each expression that evaluated true, the computer identifies the evaluation time contributing the fulfillment of assertion property. The computer also annotates the representation of each expression with its corresponding evaluation time and annotates each displayed variable symbol with a value of the variable it represents.

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Miaoli, Taiwan

Chun-Yi Lo