Silicon Motion, Inc.

Chun-Yi Lo

Chin-Pang Chang

Hsu-Ping Ou

Wei-Lun Yan

Jen-Hsin Weng

A data storage device including a flash memory and a controller. The controller enables the flash memory to transmit a predetermined parameter stored in the flash memory according to a first predetermined trigger edge of a clock signal and reads the predetermined parameter transmitted by the flash memory according to the first predetermined trigger edge of the clock signal to obtain a first reference parameter in an asynchronous mode. The controller enables the flash memory to switch to a synchronous mode and transmit the predetermined parameter and reads the predetermined parameter transmitted by the flash memory according to the first predetermined trigger edge of the clock signal to obtain a second reference parameter in a detection mode.

Mode-detection method for a storage device

A technology for calibrating device-end operational information of a data storage system is shown. A controller operates a non-volatile memory with reference to operational information. A second type of logical address requested by the host that is different from the first type of logical address used in operating a file system of a host is introduced. As indicated by the second type of logical address, the controller receives calibration information from the host and calibrates the operational information based on the calibration information.

Data storage system and calibration method for operational information used in controlling non-volatile memory

A detection method applied to a storage device including transmitting a Devslp command to a signal pin of the storage device; pulling high the voltage level at a control pin of the storage device when a first response corresponding to the Devslp command is received to enable the storage device to enter a sleep mode; pulling low the voltage level at the control pin when a first predetermined period has elapsed; transmitting a Comwake signal to the signal pin; and determining that the sleep mode of the device under test meets a specification when the storage device receives a second response corresponding to the Comwake signal in a second predetermined period.

Sleep-mode detection method thereof

Data storage device and mode-detection method thereof

A firmware update method applied to a host device and a peripheral device, wherein the peripheral device includes a memory device and a controller. The firmware update method includes: transmitting a first firmware data sector to a peripheral device from the host device, wherein the first firmware data sector has a first mode parameter; and retransmitting the first firmware data sector having a second mode parameter to the peripheral device from the host device after an interruption event has occurred on the memory device during the transmission.

Electronic device and method for firmware updating thereof

The invention provides a flash memory controller. In one embodiment, the flash memory controller is coupled to a plurality of flash memories, and comprises a driving current generator and a processor. The driving current generator generates a driving current to drive the flash memories. The processor calculates the total number of flash memories, determines a driving current value according to the total number of flash memories, and directs the driving current generator to generate the driving current with a level greater than or equal to the driving current value. The driving current value is determined by the processor to be increased with an increase of the total number of flash memories.

Flash memory controller and method for generating a driving current for flash memories

A memory device is provided, including a first memory die, a second memory die and a controller. The first memory die has a first system block. The second memory die has a second system block. The controller is coupled to the first and second memory dies through a chip enable lane in order to write the same in-system programming codes (ISP codes) to the first and second system blocks, in which, when the memory device is turned on, the controller reads the ISP code from the first system block or the second system block.

Memory devices and memory control methods with ISP code

A data protection method for a flash memory device. In one embodiment, the flash memory device comprises a flash memory for storing protected data. After the flash memory device is coupled to a host, a plurality of current read addresses of a plurality of read commands sent from the host to the flash memory device are recorded. The current read addresses are then compared with a plurality of predetermined read addresses. When the current read addresses are not identical to the predetermined read addresses, the flash memory device is made to enter a data protection mode. When the flash memory device is in the data protection mode, if the flash memory device receives a plurality of data access commands, the data access commands are processed according to a protection mode setting parameter to prevent the protected data from being accessed by the host.

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Taipei, Taiwan

Chun-Yi Lo