Au Optronics Corporation

Other

Chun-Yi Chiang

Chia-Ming Chang

Ta-Wen Liao

Hsiang-Chih Hsiao

Zong-Long Jhang

Che-Yung Lai

Chou-Huan Yu

Han-Tang Chou

Jun-Kai Chang

Chen-Pang Tung

Chia-Chi Tsai

Chun-Hsien Chiang

Ming-Haw Chang

An adjustable shoe rack includes a support structure, at least one shoes plate, and at least one holding structure. The shoes plate is disposed on the support structure and is at a predetermined distance from a ground. The holding structure is disposed on a bottom face of the shoes plate and includes two clamping structures and a moving structure. The two clamping structures are parallel arranged. Each clamping structure includes a fixed clamping element and a movable clamping element wherein a clamping space is defined therebetween for receiving shoes. The two movable clamping elements are located between the two fixed clamping elements. The moving structure is located between the two movable clamping elements and is able to drive the two movable clamping elements to move toward opposite directions at the same time so as to alternate a width of the clamping space.

Adjustable shoe rack

A pixel structure includes a gate line, a first data line, first and second pixel electrodes, first and second active devices, an insulation layer, and first and second connection electrodes. The first and second pixel electrodes are respectively disposed aside a first edge and a second edge of the gate line. The first drain electrode and second drain electrode of the first and second active devices both extend toward the second pixel electrode. The first connection electrode is electrically connected to the first drain electrode through a first contact hole and connected to the first pixel electrode; the first connection electrode and the first data line overlap in the vertical projection direction. The second connection electrode is disposed aside the second edge, and the second connection electrode is connected to the second pixel electrode and electrically connected to the second drain electrode through a second contact hole.

Pixel structure and display panel

A shelf for boots storage includes a base, a bottom plate, at least one intermediate plate, plural connecting elements, and at least one hanging element. The bottom plate is rotatably disposed on the base. The intermediate plate is located by a side of the bottom plate opposite to the base and has a predetermined distance from the bottom plate. The connecting elements connect the intermediate plate and the bottom plate. A receiving room is defined between the connecting elements, the intermediate plate and the bottom plate. The hanging element extends from a bottom of the intermediate plate toward the receiving room, and a hanging space is defined between the hanging element and the intermediate plate.

Shelf for boots storage

A method is provided for fabricating source/drain electrodes of a thin film transistor. The method generally provides a substrate having a first gate electrode and a second gate electrode adjacent and electrically connected. The method further provides coating a photoresist layer on the metal layer, and performing an exposure process on the photoresist layer by a photomask. The method further performs a development process on the exposed photoresist layer to form a photoresist pattern layer with different thicknesses on the metal layer, and then etches the metal layer using the photoresist pattern layer as an etch mask, to form a pair of first source/drain electrodes on the first gate electrode and a pair of second source/drain electrodes on the second gate electrode.

Photomask and method for fabricating source/drain electrode of thin film transistor

A photomask for fabricating a thin film transistor (TFT) is disclosed. The photomask includes a translucent layer disposed on a transparent substrate and covering U-shaped and rectangular channel-forming regions of the transparent substrate. First and second light-shielding layers are disposed on the translucent layer and located at the outer and inner sides of the U-shaped channel-forming region, respectively, and third and fourth light-shielding layers are disposed on the translucent layer and located at opposite sides of the rectangular channel-forming region, respectively, to serve as source/drain-forming regions. An end of the third light-shielding layer extends to the first light-shielding layer. A plurality of first light-shielding islands is disposed on the translucent layer and located within the rectangular channel-forming region. A method for fabricating source/drain electrodes of a TFT is also disclosed.

A pixel structure fabricating method is provided. A gate is formed on a substrate. A gate insulation layer covering the gate is formed on the substrate. A channel layer, a source, and a drain are simultaneously formed on the gate insulation layer above the gate. The gate, channel layer, source, and drain form a thin film transistor (TFT). A passivation layer is formed on the TFT and the gate insulation layer. A black matrix is formed on the passivation layer. The black matrix has a contact opening above the drain and a color filter containing opening. A color filer layer is formed within the color filter containing opening through inkjet printing. A dielectric layer is formed on the black matrix and the color filter layer. The dielectric layer and the passivation layer are patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.

Method for fabricating pixel structure

A pixel structure fabricating method is provided. A gate and a gate insulation layer covering the gate are formed on a substrate. A channel layer is formed on the gate insulation layer. A conductive layer is formed on the channel layer and gate insulation layer. A black matrix having a color filer layer accommodating opening is formed on the conductive layer. The black matrix includes a first block and a second block which is thicker than the first block. The conductive layer is patterned with the black matrix as a mask to form a source and a drain on the channel layer. A color filter layer is formed within the color filter layer accommodating opening through inkjet printing. A dielectric layer is formed on the black matrix and color filter layer. The dielectric layer is patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.

A fabricating method for a pixel structure including following procedures is provided. First, a gate and a gate insulator layer are formed sequentially on a substrate. Next, a semiconductor layer, a conductive layer and a photosensitive black matrix having a color filter containing opening are sequentially formed on the gate insulator layer. The photosensitive black matrix includes a first portion and a second portion. A thickness of the first portion is smaller than that of the second portion. A channel, a source and a drain are formed simultaneously using the photosensitive black matrix as a mask. A passivation is formed on the substrate, and a color filer layer is formed within the color filter containing opening via an inkjet printing process and a dielectric layer is formed thereon. Next, a patterning process is applied to expose the drain. Ultimately, a pixel electrode connected to the drain is formed.

Growing community of inventors

Taichung, Taiwan

Chun-Yi Chiang