United Microelectronics Corp.

Chun-Wei Yu

Yu-Ren Wang

Kuang-Hsiu Chen

Chueh-Yang Liu

Hsu Ting

Yi-Liang Ye

Sung-Yuan Tsai

Yu-Ying Lin

Chi-Hsuan Tang

Shi-You Liu

Zhen Wu

Keng-Jen Lin

Tai-Yen Lin

Neng-Hui Yang

Chung-Fu Chang

Po-Jen Chuang

Chia-Ming Kuo

Yen-Hsing Chen

Fu-Jung Chuang

Shao-Wei Wang

Chun-Jen Chen

Shao-Hua Hsu

Ted Ming-Lang Guo

Wen-Jiun Shen

Hao-Hsuan Chang

Chao-Nan Chen

Kai-Hsiang Wang

Kuan Hsuan Ku

Chia-Wei Hsu

Wei-Chung Sun

Chao Nan Chen

Provided are a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure includes the following. A gate structure is formed on a substrate. A tilt implanting process is performed to implant group IV elements into the substrate to form a doped region, and the doped region is located on two sides of the gate structure and partially located under the gate structure. A part of the substrate on two sides of the gate structure is removed to form a first recess. A cleaning process is performed on the surface of the first recess. A wet etching process is performed on the first recess to form a second recess. A semiconductor layer is formed in the second recess.

Semiconductor structure and manufacturing method thereof

A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.

Method of fabricating semiconductor device having epitaxial structure

Semiconductor device having epitaxial structure

A manufacturing method of a semiconductor structure includes the following steps. A patterned mask layer is formed on a semiconductor substrate. An isolation trench is formed in the semiconductor substrate by removing a part of the semiconductor substrate. A liner layer is conformally formed on an inner sidewall of the isolation trench. An implantation process is performed to the liner layer. The implantation process includes a noble gas implantation process. An isolation structure is at least partially formed in the isolation trench after the implantation process. An etching process is performed to remove the patterned mask layer after forming the isolation structure and expose a top surface of the semiconductor substrate. A part of the liner layer formed on the inner sidewall of the isolation trench is removed by the etching process. The implantation process is configured to modify the etch rate of the liner layer in the etching process.

Manufacturing method of semiconductor structure

A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.

Semiconductor device and method for forming the same

A method of forming a gate structure on a fin structure includes the steps of providing a fin structure covered by a first silicon oxide layer, a silicon nitride layer, a gate material and a cap material in sequence, wherein the silicon nitride layer contacts the first silicon oxide layer. Later, the cap material is patterned to form a first cap layer and the gate material is patterned to form a first gate electrode by taking the silicon nitride layer as an etching stop layer. Then, the silicon nitride layer not covered by the first gate electrode is removed to expose part of the first silicon oxide layer. Finally, a first dielectric layer is formed to conformally cover the first silicon oxide layer, the first gate electrode and the first cap layer.

FinFET structure and fabricating method of gate structure

A method of rounding corners of a fin includes providing a substrate with a fin protruding from the substrate, wherein a pad oxide and a pad nitride entirely cover a top surface of the fin. Later, part of the pad oxide is removed laterally to expose part of the top surface of the fin. A silicon oxide layer is formed to contact two sidewalls of the fin and the exposed top surface, wherein two sidewalls and the top surface define two corners of the fin. After forming the silicon oxide layer, an annealing process is performed to round two corners of the fin. Finally, after the annealing process, an STI filling material is formed to cover the pad nitride, the pad oxide and the fin.

Method of rounding corners of a fin

A semiconductor device comprises at least one gate structure disposed on a substrate; a first dielectric layer disposed on the substrate and contacting an outer sidewall of the at least one gate structure; a second dielectric layer having a L shape disposed on the first dielectric layer and contacting the outer sidewall of the at least one gate structure; an etch stop layer contacting the second dielectric layer, the first dielectric layer and the substrate, wherein the second dielectric layer has an upper portion and a lower portion contacting the upper portion, the upper portion extends along the outer sidewall, the lower portion extends from the outer sidewall to the etch stop layer; and an air gap between the second dielectric layer and the etch stop layer; wherein the first dielectric layer and the lower portion of the second dielectric layer have a same width.

Semiconductor device and method for manufacturing the same

A semiconductor device includes: a substrate; a gate structure on the substrate; and an epitaxial layer in the substrate adjacent to the gate structure, in which the epitaxial layer includes a planar surface and protrusions adjacent to two sides of the planar surface. Preferably, a contact plug is embedded in part of the epitaxial layer, and a silicide is disposed under the contact plug, in which a bottom surface of the silicide includes an arc.

Semiconductor device having epitaxial layer with planar surface and protrusions

A method for processing a semiconductor device is provided. The semiconductor device includes a protruding structure on a substrate, the protruding structure having a nitride spacer at a sidewall, and an epitaxial layer is formed in the substrate adjacent to the protruding structure. The method includes removing the nitride spacer on the protruding structure. Then, a dilute hydrofluoric (DHF) cleaning process is performed over the substrate, wherein a top surficial portion of the epitaxial layer is removed. A standard clean (SC) process is performed over the substrate, wherein a native oxide layer is formed on an expose surface of the epitaxial layer.

Method for processing semiconductor device

A method for fabricating semiconductor device includes the steps of: forming a first gate structure on a substrate; performing a first etching process to form a recess adjacent to the first gate structure; performing an ion implantation process to form an amorphous layer directly under the recess; performing a second etching process to remove the amorphous layer; and forming an epitaxial layer in the recess.

Method for fabricating semiconductor device

A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.

Semiconductor device and manufacturing method thereof

A method for fabricating a semiconductor device. A gate is formed on a substrate. A spacer is formed on each sidewall of the gate. A hard mask layer is formed on the spacer. A recessed region is formed in the substrate and adjacent to the hard mask layer. An epitaxial layer is formed in the recessed region. The substrate is subjected to an ion implantation process to bombard particle defects on the hard mask layer with inert gas ions. An annealing process is performed to repair damages to the epitaxial layer caused by the ion implantation process. The hard mask layer is then removed.

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Tainan, Taiwan

Chun-Wei Yu